Semiconductor device manufacturing: process – With measuring or testing
Reexamination Certificate
2011-08-02
2011-08-02
Kebede, Brook (Department: 2894)
Semiconductor device manufacturing: process
With measuring or testing
C438S197000, C257SE21001
Reexamination Certificate
active
07989230
ABSTRACT:
A method for manufacturing a MOS device. The method includes providing a semiconductor substrate. The method forms a gate dielectric layer overlying the semiconductor substrate and a polysilicon gate overlying the gate dielectric layer. The polysilicon gate is characterized by a thickness, a width and a polysilicon footing profile. In a specific embodiment, the method performs a TCAD simulation and determines a response of device performance due to the polysilicon footing profile from the model. The method uses the model to provide a process control window for fabricating the polysilicon gate.
REFERENCES:
patent: 6622059 (2003-09-01), Toprac et al.
patent: 2008/0286887 (2008-11-01), Goo et al.
patent: 101075267 (2007-11-01), None
Office Action of Chinese Application No. 200810036944.9, dated Apr. 29, 2010, 5 pages total (English translation not included).
Kebede Brook
Kilpatrick Townsend and Stockton LLP
Semiconductor Manufacturing International (Shanghai) Corporation
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