Method for plasma etching of Ir-Ta-O electrode and for...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S708000, C438S711000, C438S714000, C438S720000, C438S726000

Reexamination Certificate

active

06541385

ABSTRACT:

FIELD OF THE INVENTION
This invention relates to etching of electrode in integrated circuits, and specifically to a method of plasma etching an iridium—tantalum—oxide electrode in a ferroelectric integrated circuit, and a method for cleaning the etching debris.
BACKGROUND OF THE INVENTION
Electrodes used in ferroelectric devices are usually formed from platinum or iridium, and are generally etched using ion milling or chlorine-based chemistries. Etching is usually preceded by physical sputtering, but occasionally may be preceded by plasma-assisted chemical etching. Such processes result in a low etching rate, poor selectivity in that the etching removes materials not intended to be removed, and re-deposition of etch-removed materials. Poor sidewall profiles are also frequent occurrences.
SUMMARY OF THE INVENTION
A method of forming an electrode in an integrated circuit includes preparing a silicon-base substrate, including forming semiconductor structures on the substrate to form an integrated substrate structure; depositing a layer of electrode material on a substrate structure; patterning the layer of electrode material to form electrode elements, wherein said patterning includes plasma etching the layer of electrode material in a plasma reactor in an etching gas atmosphere having a fluorine component therein; and cleaning the substrate structure and electrode elements in a distilled water bath.
It is an object of the invention to provide accurate patterning of Ir-Ta-O electrodes.
Another object of the invention is to provide a method of rapid etching of an electrode in a ferroelectric device.
A further object of the invention is to provide a reliable manufacturing process for Ir-Ta-O electrodes when used with ferroelectric devices.
Another object of the invention is to provide a method for removing etching debris from the structure.
This summary and objectives of the invention are provided to enable quick comprehension of the nature of the invention. A more thorough understanding of the invention may be obtained by reference to the following detailed description of the preferred embodiment of the invention in connection with the drawings.


REFERENCES:
patent: 5008687 (1991-04-01), Longman et al.
patent: 5708284 (1998-01-01), Onishi
patent: 5793057 (1998-08-01), Summerfelt
patent: 5854107 (1998-12-01), Park et al.
patent: 6368518 (2001-04-01), Vaartstra
patent: 6261967 (2001-07-01), Athavale et al.
patent: 6368517 (2002-04-01), Hwang et al.
Article entitled, “Improvement of Ta Diffusion Barrier Performance in Cu Metallization by Insertion of a Thin Zr Layer Into Ta Film”, by J.S. Kwak and H.K. Baik, published in Applied Physics Letters, vol. 72, No. 22, pp 2832-2834.
Article entitled, “Investigation of Pt/Ta Diffusion Barrier Using Hybrid Conductive Oxide (RuO2) for High Dielectric Applications” by D-S. Yoon and H. K. Baik, published in J. Vac. Sci. Technol. B 16(3), May/Jun. 1998, pp 1137-1141.
Article entitled, “Oxidation Resistance of Tantalum-Ruthenium Dioxide Diffusion Barrier for Memory Capacitor Bottom Electrodes” by D-S Y, H.K. Baik, S-M Lee, C-S Park and S-I Lee, published in Applied Physics Letters, vol. 73, No. 3, Jul. 1998, pp 324-326.
Article entitled, “Oxide (CeO2)-incorporated new diffusion barrier for Cu metallization” by D-S Yoon, S-M Lee and H. K. Baik, published in 1998 Materials Research Society, Conference Proceedings ULSI XIII, pp 103-109.

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