Electrolysis: processes – compositions used therein – and methods – Electrolytic coating – Coating selected area
Reexamination Certificate
2003-12-17
2008-11-11
Tsang-Foster, Susy (Department: 1795)
Electrolysis: processes, compositions used therein, and methods
Electrolytic coating
Coating selected area
C205S123000, C205S182000, C205S210000, C205S221000, C205S222000
Reexamination Certificate
active
07449098
ABSTRACT:
A disclosed form of mechanically assisted electroplating leads to a flat, thin, overburden. In one example, an accelerator is deposited on a copper surface and mechanically removed in a simplified CMP-like apparatus. The wafer is then plated in an electrolyte containing little or no accelerating additives.
REFERENCES:
patent: 3183176 (1965-05-01), Schwartz
patent: 3313715 (1967-04-01), Schwartz
patent: 3393134 (1968-07-01), Schwartz
patent: 3619383 (1971-11-01), Eisner
patent: 3619384 (1971-11-01), Eisner
patent: 3661752 (1972-05-01), Capper et al.
patent: 3749652 (1973-07-01), Eisner
patent: 3751343 (1973-08-01), Macula et al.
patent: 3849270 (1974-11-01), Takagi et al.
patent: 3904489 (1975-09-01), Johnson
patent: 4119499 (1978-10-01), Eidschun, Jr.
patent: 4227986 (1980-10-01), Loqvist et al.
patent: 4363711 (1982-12-01), Kuehnle
patent: 4452684 (1984-06-01), Palnik
patent: 4592808 (1986-06-01), Doubt
patent: 4738756 (1988-04-01), Mseitif
patent: 5034753 (1991-07-01), Weber
patent: 5096550 (1992-03-01), Mayer et al.
patent: 5158860 (1992-10-01), Gulla et al.
patent: 5169514 (1992-12-01), Hendriks et al.
patent: 5203955 (1993-04-01), Viehbeck et al.
patent: 5256565 (1993-10-01), Bernhardt et al.
patent: 5277785 (1994-01-01), Van Anglen
patent: 5378346 (1995-01-01), Ashiru et al.
patent: 5453174 (1995-09-01), Van Anglen et al.
patent: 5462649 (1995-10-01), Keeney et al.
patent: 5486234 (1996-01-01), Contolini et al.
patent: 5557027 (1996-09-01), Kemp
patent: 5807165 (1998-09-01), Uzoh et al.
patent: 5843296 (1998-12-01), Greenspan
patent: 6056864 (2000-05-01), Cheung
patent: 6056869 (2000-05-01), Uzoh
patent: 6083835 (2000-07-01), Shue et al.
patent: 6103628 (2000-08-01), Talieh
patent: 6121152 (2000-09-01), Adams et al.
patent: 6143155 (2000-11-01), Adams et al.
patent: 6152586 (2000-11-01), Dealey, Jr. et al.
patent: 6153521 (2000-11-01), Cheung et al.
patent: 6171467 (2001-01-01), Weihs et al.
patent: 6176992 (2001-01-01), Talieh
patent: 6207572 (2001-03-01), Talieh et al.
patent: 6251235 (2001-06-01), Talieh et al.
patent: 6315883 (2001-11-01), Mayer et al.
patent: 6328872 (2001-12-01), Talieh et al.
patent: 6344129 (2002-02-01), Rodbell et al.
patent: 6409904 (2002-06-01), Uzoh et al.
patent: 6413338 (2002-07-01), DiPalma
patent: 6447668 (2002-09-01), Wang
patent: 6478936 (2002-11-01), Volodarsky et al.
patent: 6482307 (2002-11-01), Ashjaee et al.
patent: 6534116 (2003-03-01), Basol
patent: 6630059 (2003-10-01), Uzoh et al.
patent: 6638411 (2003-10-01), Mishima et al.
patent: 6653226 (2003-11-01), Reid
patent: 6756307 (2004-06-01), Kelly et al.
patent: 6793796 (2004-09-01), Reid et al.
patent: 6797132 (2004-09-01), Talieh et al.
patent: 6815354 (2004-11-01), Uzoh et al.
patent: 6858121 (2005-02-01), Basol
patent: 6863795 (2005-03-01), Teerlinck et al.
patent: 6867136 (2005-03-01), Basol et al.
patent: 6902659 (2005-06-01), Talieh
patent: 6921551 (2005-07-01), Basol
patent: 6946066 (2005-09-01), Basol et al.
patent: 7129165 (2006-10-01), Basol et al.
patent: 2001/0013472 (2001-08-01), Nakamura et al.
patent: 2004/0226827 (2004-11-01), Matsuda et al.
Contolini, et al., “Electrochemical Planarization for Multilevel Metallization”, Lawrence Livermore National Laboratory, J. Electrochem Soc., vol. 141, No. 9, Sep. 1994, pp. 2502-2510.
Sato, et al., “Newly Developed Electro-Chemical Polishing Process of Copper as Replacement of CMP Suitable for Damascene Copper Inlaid in Fragile Low-k Dielectrics”, Advanced Process R & D Laboratories, LSI Technology Development, Semiconductor Network Company, Sony Corporation, IEDM Meeting, Dec. 2-5, 2001, pp. 1-4.
Tsai, et al., “CMP-Free CMP-Less Approached for Multilevel Cu/low-k BEOL Integration”, Taiwan Semiconductor Manufacturing Company, No. 9, IEDM Meeting, Dec. 2-5, 2001, pp. 1-4.
Mayer, et al., “Method and Apparatus for Uniform Electropolishing of Damascene IC Structures by Selective Agitation”, Novellus Systems, Inc., U.S. Appl. No. 09/967,075, filed Sep. 28, 2001, pp. 1-50.
Osterwald et al., “New Theoretical Ideas about the Action of Bath Additives During Cathodic Deposition”, Galvanotechnik, vol. 66 (1975), No. 5, pp. 360-365.
Eisner, S., “Electroplating Accompanied by Controlled Abrasion of the Plate”, Oct. 1971, pp. 993-996.
Osterwald, Jorg, “Leveling and Roughening by Inhibitors and Catalyst”, Institute for Metallurgy of the Technical University of Berlin, vol. 17, No. 5, 1976, pp. 89-94.
Patton et al., “Sequential Station Tool for Wet Processing of Semiconductor Wafers”, Novellus Systems, Inc., U.S. Appl. No. 10/693,223, filed Oct. 24, 2003, pp. 1-32.
US Office Action, mailed Dec. 12, 2007, for U.S. Appl. No. 11/065,708.
U.S. Office Action, mailed Nov. 20, 2007 for U.S. Appl. No. 10/824,069.
Notification of ownership transfer of certain patents owned by NuTool, Inc., 2007.
U.S. Appl. No. 10/824,069 filed Apr. 13, 2004.
Notice of Allowance, mailed May 15, 2008 for U.S. Appl. No. 10/824,069.
Office Action as mailed on Jun. 13, 2008 for U.S. Appl. No. 11/065,708.
Drewery John S.
Emesh Ismail T.
Mayer Steven T.
Meinhold Henner W.
Rea Mark L.
Leader William T
Novellus Systems Inc.
Tsang-Foster Susy
Weaver Austin Villeneuve & Sampson LLP
LandOfFree
Method for planar electroplating does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for planar electroplating, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for planar electroplating will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4035049