Method for performing erasing operation in nonvolatile...

Static information storage and retrieval – Floating gate – Particular connection

Reexamination Certificate

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C365S185240, C365S185290, C365S185300

Reexamination Certificate

active

07830717

ABSTRACT:
A method for performing erasing operation in a nonvolatile memory device includes the steps of applying an erasing voltage to P-wells of a selected memory cell block which is composed of a plurality of strings in each of which a plurality of memory cells and side memory cells are connected in series; performing soft programming operation by applying a soft programming voltage to word lines of the selected memory cell block; and programming the side memory cells by applying a programming voltage to the side memory cells.

REFERENCES:
patent: 6304486 (2001-10-01), Yano
patent: 6826082 (2004-11-01), Hwang et al.
patent: 7187584 (2007-03-01), Chang
patent: 7206241 (2007-04-01), Kido et al.
patent: 7564724 (2009-07-01), Park
patent: 2009/0067248 (2009-03-01), Lee
patent: 11-031392 (1999-02-01), None
patent: 1020070018216 (2007-02-01), None
patent: WO 2006/105120 (2006-10-01), None

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