Method for patterning wirings of semiconductor integrated circui

Details Method for patterning wirings of semiconductor integrated circui Method for patterning wirings of semiconductor integrated circui

1993-03-18

1995-05-02

Quach, T. N.

Fishing, trapping, and vermin destroying

437195, 437203, 437228, H01L 2160

Patent

active

054119162

ABSTRACT:
As shown in FIG. 4, a wiring pattern of a semiconductor integrated circuit device of the present invention comprises a wiring portion extending from a connection hole and a connection portion located on the connection hole and having a matching allowance with respect to said connection hole on said wiring portion side being formed wider than a predetermined matching allowance by a predetermined width with which a required yield of successful matching can be assured.

REFERENCES:
patent: 4196443 (1980-04-01), Dingwall
patent: 4381215 (1983-04-01), Reynolds et al.
patent: 4812419 (1989-03-01), Lee et al.
R. E. Oakley et al., "Pillars-The Way to Two Micron Pitch Multilevel Metallisation," IEEE VLSE Multilevel Interconnection Conference Proceedings, Jun. 21-22, 1984, pp. 23-29.

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