Method for patterning low dielectric layer of semiconductor...

Details Method for patterning low dielectric layer of semiconductor... Method for patterning low dielectric layer of semiconductor...

2005-12-30

2008-08-26

Vinh, Lan (Department: 1792)

Semiconductor device manufacturing: process

Chemical etching

Vapor phase etching

C438S706000, C438S709000, C216S066000

Reexamination Certificate

active

07416990

ABSTRACT:
A method for patterning a low dielectric insulating layer of a semiconductor device improves adhesion between a photoresist and the low dielectric (Low-K) insulating layer by removing at least one hydroxyl group from a surface of the Low-K insulating layer with a beam. Reliability of the device is thereby improved. The method includes forming a Low-K insulating layer on a semiconductor substrate, irradiating the Low-K insulating layer with a beam to make the Low-K insulating layer hydrophobic, forming a photoresist pattern on the Low-K insulating layer, and ashing the photoresist pattern.

REFERENCES:
patent: 5230985 (1993-07-01), Lohaus et al.
patent: 6756085 (2004-06-01), Waldfried et al.
patent: 6903027 (2005-06-01), Matsuura
patent: 7091137 (2006-08-01), Lee et al.
patent: 7253125 (2007-08-01), Bandyopadhyay et al.
patent: 7262142 (2007-08-01), Nakata et al.
patent: 2004/0029386 (2004-02-01), Lee et al.
patent: 1999-62415 (1999-07-01), None

Affiliated with

Also associated with

Rating

Method for patterning low dielectric layer of semiconductor... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for patterning low dielectric layer of semiconductor..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for patterning low dielectric layer of semiconductor... will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3999188