Method for patterning dielectric layers on semiconductor...

Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching

Reexamination Certificate

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C438S637000, C438S700000, C438S745000

Reexamination Certificate

active

10724141

ABSTRACT:
The invention relates to a process for patterning dielectric layers. A photoresist layer is applied to the dielectric layer and patterned. Then, the pattern which has been predetermined by the resist mask is transferred to the dielectric layer. The incineration of the resist mask is carried out a temperature of 50° C. to 200° C., with the oxygen plasma being generated from a gas which has an oxygen content of 40 to 60% by volume. During a subsequent step of cleaning the patterned dielectric layer using dilute hydrofluoric acid, the trenches which have been introduced into the dielectric layer are widened to a significantly lesser extent than after incineration under the conditions which have previously been customary.

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Article entitled “Limitation of HF-Based Chemistry for Deep-Submicron Contact Hole Cleaning on Silicides” by M.R. Baklanov et al. , J. Electrochem. Soc., vol. 145, No. 9 Sep. 1998 by The Electrochemical Society, Inc., pp. 3240-3246. Article entitled “low-k dielectric etching” by D.J. Thomas et al., published Mar. 2001 in Solid State Technology, pp. 107, 108, 112-116 (www.solid-state.com).
Copy of German Office Action dated Oct. 20, 2003.

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