Method for parallel alignment of a chip to substrate

Details Method for parallel alignment of a chip to substrate Method for parallel alignment of a chip to substrate

1999-05-11

2000-11-14

Bowers, Charles

Semiconductor device manufacturing: process

With measuring or testing

Packaging or treatment of packaged semiconductor

438800, H01L 2166, G01R 3126

Patent

active

061469122

ABSTRACT:
A method and apparatus for bonding a chip to a substrate is described, wherein the apparatus includes a chip holder assembly comprising an outer holder having a cavity formed therein and an inner holder for holding the chip, and by releaseably securing the inner holder within the outer holder cavity and contacting the chip to the substrate the inner holder has selective angular rotation within the cavity to make parallel the chip and the substrate.

REFERENCES:
patent: 3840978 (1974-10-01), Lynch et al.
patent: 5118584 (1992-06-01), Evans et al.
patent: 5558271 (1996-09-01), Rostoker et al.
Brochure: Research Devices, Inc., Flip Chip Aligner Bonders, 4 pages.

Affiliated with

Also associated with

Rating

Method for parallel alignment of a chip to substrate does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for parallel alignment of a chip to substrate, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for parallel alignment of a chip to substrate will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-2064089