Method for packaging electronic modules and multiple chip...

Active solid-state devices (e.g. – transistors – solid-state diode – Housing or package – For plural devices

Reexamination Certificate

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Details

C257S725000

Reexamination Certificate

active

07042085

ABSTRACT:
A method for packaging electronic assemblies and a multiple chip package, at least one power semiconductor chip being applied to a base plate using a first solder, at least one logic chip being applied to the base plate, the logic chip and the base plate being positioned electrically insulated from one another, at least one logic chip being connected to the at least one power semiconductor chip using signal transmission lines, and the electronic assembly including the at least one power semiconductor chip and the at least one logic chip being packaged using a molding compound in order to provide a multiple chip package.

REFERENCES:
patent: 5012332 (1991-04-01), Guillotte et al.
patent: 5093713 (1992-03-01), Sawaya
patent: 5096852 (1992-03-01), Hobson
patent: 5305186 (1994-04-01), Appelt et al.
patent: 5781047 (1998-07-01), Shreve et al.
patent: 6300146 (2001-10-01), Thierry
patent: 2002/0190317 (2002-12-01), Mukherjee et al.
patent: 15 64 147 (1969-10-01), None
patent: 197 16 674 (1998-08-01), None
patent: 100 22 482 (2000-12-01), None
patent: 0 757 442 (1997-02-01), None
patent: 07 221125 (1995-08-01), None
patent: WO 01/37336 (2001-05-01), None
Thomas Stockmeier, Power Semiconductor—A Problem or a Resource?, From the State of the Art to Future Trends, PCIM 2000, Conference Proceeding, PC7.2., pp. 195-205.
Peter Van Zant, Michrochip Fabrication, Fourth Edition, McGraw-Hill, 2000, pp. 388-389, pp. 570-571.

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