Method for packaging chip and package assembly produced thereby

Details Method for packaging chip and package assembly produced thereby Method for packaging chip and package assembly produced thereby

2006-10-17

2006-10-17

Geyer, Scott B. (Department: 2812)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Having light transmissive window

Reexamination Certificate

active

07122405

ABSTRACT:
A chip package assembly is produced by preparing a transparent substrate in advance, a chip is electrically connected to a circuit layout of the transparent substrate. Make sure an unoccupied layer is sealed between the transparent substrate and the chip, so as to form the chip package assembly. After the processes mentioned above are done, the chip package assembly can leave the clean room to run post-processes, such as die sawing, or camera module packaging.

REFERENCES:
patent: 6472247 (2002-10-01), Andoh et al.
patent: 6596565 (2003-07-01), Hembree
patent: 6657293 (2003-12-01), Fumihira
patent: 6673711 (2004-01-01), Tong et al.
patent: 6723630 (2004-04-01), Tong et al.
patent: 6744137 (2004-06-01), Kinsman
patent: 6777268 (2004-08-01), Jiang
patent: 6781245 (2004-08-01), Huang
patent: 6784113 (2004-08-01), Hembree
patent: 6787921 (2004-09-01), Huang
patent: 6798053 (2004-09-01), Chiu
patent: 6885107 (2005-04-01), Kinsman

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