Method for packaging a semiconductor device

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor

Reexamination Certificate

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C438S108000, C438S123000

Reexamination Certificate

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07344917

ABSTRACT:
A method for packaging a semiconductor device includes forming through holes (12) in a base substrate (10) and depositing a conductive material (14) on a first side (16) of the base substrate (10) to form a conductive layer (18) such that the conductive material (14) fills the through holes (12). The conductive layer (18) is patterned and etched to form interconnect traces and pads (22). Conductive supports (24) are formed on the pads (22) such that the conductive supports (24) extend through respective ones of the through holes (12).

REFERENCES:
patent: 6483180 (2002-11-01), Bayan et al.
patent: 6689638 (2004-02-01), Lin et al.
patent: 6759268 (2004-07-01), Akagawa
patent: 6861284 (2005-03-01), Higashi et al.
patent: 7078269 (2006-07-01), Yamasaki et al.
patent: 2003/0224542 (2003-12-01), Liu
patent: 2004/0145039 (2004-07-01), Shim et al.
patent: 2006/0255474 (2006-11-01), Ahmad et al.

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