Method for optimizing stability of a line interface circuit...

Telephonic communications – Subscriber line or transmission line interface

Reexamination Certificate

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Details

C379S093050, C379S398000

Reexamination Certificate

active

06353668

ABSTRACT:

TECHNICAL FIELD
This invention relates to line interface circuits deployed in telecommunications networks and, more particularly, to maintaining an optimum stability of such line interface circuits by manipulating phase margins.
BACKGROUND OF THE INVENTION
Line interface circuits interconnect customer premises equipment to central office switches by subscriber lines (commonly referred to as subscriber loops). For administrative purposes, a plurality of line interface circuits are grouped in an integrated services line unit (ISLU). A line interface circuit includes means for delivering current to a subscriber loop via an external power source. In modem line interface circuits, the means for delivering current to the subscriber loop is a battery feed. Voltage generated by the external power source is processed by a switching converter circuit before delivery to the battery feed circuit. The power delivered to the subscriber loop by the battery feed circuit enables a central office switch to detect the presence, and status, of customer premises equipment served by the loop. The battery feed circuit also couples audio signals transmitted by the central office switch to the customer premises equipment and vice versa. Power supplied to the switching converter circuit is processed by a transformer which produces a predetermined battery voltage (V
BAT
). The predetermined battery voltage is established to provide adequate current to interconnect customer premises equipment to a central office switch and to provide high quality voice transmission to the subscriber loop.
It is well known that normal line interface circuit operation results in the dissipation of power due to losses associated with the internal line interface circuit components. U.S. Pat. No. 5,754,644, assigned to Lucent Technologies Inc., addresses issues associated with power losses and is incorporated by reference herein. Although the inefficient operation of an individual line interface circuit might be tolerable, the accumulation of losses (due to the large number of line interface circuits deployed in a single ISLU) significantly impacts the overall efficiency of a central office switch.
Therefore, it is of critical importance to telecommunications service providers to continually enhance the performance of individual line interface circuits.
SUMMARY OF THE INVENTION
It is recognized that an important determinant of the efficiency and reliability of a line interface circuit is related to the stability of a feedback control loop contained within the circuit. The need for stable line interface circuits is addressed and a technological advance is achieved in the art by synthesizing a feedback control loop (circuit) to manipulate the operating phase margin between the battery feed voltage (V
BAT
) and an output voltage (V
0
) of the line interface circuit. Synthesizing the feedback control circuit requires adjusting feedback control circuit parameters (resistance and capacitance) and an output voltage value of the circuit.
In one embodiment of the present invention, each line interface circuit is equipped with a phase detector for determining the phase angle between V
BAT
and output voltage V
0
. The detected phase angle is delivered to a digital signal processor which uses the phase angle to determine if the feedback circuit needs to be resynthesized to adjust the phase angle between V
BAT
and V
0
to approximate a maximum operational stability (a phase angle of forty-five degrees 45°). In another embodiment, a database in the digital signal processor maintains predetermined output voltage values and feedback control circuit resistance and capacitance parameters for optimizing the phase angle between V
BAT
and V
0
. Advantageously, equipping the line interface circuit with a phase angle detector and ensuring that the phase margin between V
BAT
and V
0
approximates 45° enables the line interface circuit to operate at optimum stability.


REFERENCES:
patent: 5754644 (1998-05-01), Akhteruzzaman
patent: 5815569 (1998-09-01), Akhteruzzaman
patent: 5822426 (1998-10-01), Rasmus et al.
patent: 5828748 (1998-10-01), Akhteruzzaman
patent: 6201865 (2001-03-01), Dupuis et al.

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