Static information storage and retrieval – Addressing – Plural blocks or banks
Patent
1999-10-14
2000-06-06
Fears, Terrell W.
Static information storage and retrieval
Addressing
Plural blocks or banks
365 49, 365203, G11C 700
Patent
active
060727454
ABSTRACT:
A memory system is able to simultaneously access multiple rows in page mode operation. The multiple page memory includes a memory array with multiple internal read registers to improve the effective page cycle time. The multiple page memory of this invention is very effective in graphics applications where multiple page memory access is required. A memory with multiple page random access in accordance with this invention greatly enhances performance by allowing different sources to continue to access the memory in the page mode, in spite of intervening memory accesses by other sources to other rows of the memory. A VRAM with multiple page random access in accordance with this invention provides an even higher performance graphic memory system.
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Ng Sunny T.
Nguyen Tuan
Caserza Steven F.
Fears Terrell W.
Oak Technology Incorporated
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