Static information storage and retrieval – Addressing – Sync/clocking
Reexamination Certificate
2005-10-04
2005-10-04
Tran, Andrew Q. (Department: 2824)
Static information storage and retrieval
Addressing
Sync/clocking
C365S194000, C365S191000, C365S210130, C365S189070, C365S236000
Reexamination Certificate
active
06952378
ABSTRACT:
The present invention relates to a method of operating a memory system comprising a memory chip. An operating signal is generated at an operating frequency. The operating frequency is applied to the memory chip to control one or more electrical components of the memory system. A reference signal is generated at a reference frequency within the memory chip and a range of values for the operating frequency is detected based on the reference signal and the operating signal.
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Edmonds Johnathan T.
Huckaby Jennifer
Partsch Torsten
Tian Tao
Infineon - Technologies AG
Tran Andrew Q.
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