Single-crystal – oriented-crystal – and epitaxy growth processes; – Processes of growth from liquid or supercritical state – Having pulling during growth
Patent
1999-02-17
2000-05-09
Hiteshew, Felisa
Single-crystal, oriented-crystal, and epitaxy growth processes;
Processes of growth from liquid or supercritical state
Having pulling during growth
26902, C30B 1500
Patent
active
060598778
DESCRIPTION:
BRIEF SUMMARY
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a process for making a wafer with large dimensions made of a semiconducting material. It also concerns the use of the resulting wafer to make Semiconductor On Insulator type substrates, and particularly Silicon On Insulator substrates.
2. Discussion of the Background
There are several known processes for making a substrate composed of a layer or a film of semiconducting material on an insulating support. In particular, these processes can be used to make Silicon On Insulator type substrates.
Hetero-epitaxy methods can be used for crystalline growth, for example to grow a silicon crystal as a thin film on a mono-crystalline substrate of another nature, which has a mesh parameter similar to the mesh parameter of silicon, for example a sapphire substrate (Al.sub.2 O.sub.3) or a calcium fluoride (CaF.sub.2) substrate.
The SIMOX process uses ionic implantation with a high oxygen dose without a silicon substrate to create a layer of silicon oxide within the volume of the silicon, separating a thin film of mono-crystalline silicon from the mass of the substrate.
Other processes use the principle of thinning a wafer by mechanical-chemical or chemical abrasion. The most efficient processes in this category also use the principle of an etching stop barrier that stops thinning of the wafer as soon as the required thickness is reached, and therefore guarantee a uniform thickness. As an example, this technique consists of p type doping of an n type substrate over the required film thickness, and chemically etching the substrate with a chemical bath that is active for n type silicon and inactive for p type silicon.
The main applications of thin semiconductor films are Silicon On Insulator substrates, silicon or silicon carbide self-supporting membranes to make masks for X-ray lithography, sensors, solar cells, and production of integrated circuits with several active layers.
The various methods of making thin films have disadvantages related to manufacturing techniques.
Hetero-epitaxy methods are limited by the nature of the substrate. Since the substrate mesh parameter is not exactly the same as for the semiconductor, the thin film will contain many crystalline defects. Furthermore, these substrates are expensive and fragile, and are only available in limited dimensions.
The SIMOX method requires ionic implantation with a very high dose which requires a very heavy and complex implantation machine. The throughput of these machines is low and it is difficult to see how it could be increased in significant proportions.
Methods of reducing the thickness are competitive from the point of view of homogeneity and quality only if they use the etching stop barrier principle. Unfortunately, creating the stop barrier makes this process complex and in some cases can limit applications of the film. If the etching stop is made by p type doping in an n type substrate, any electronic devices made using this film must be designed as a function of the p type nature of the film.
A more recent process was developed to overcome the disadvantages of these prior techniques. This process, described in document FR-A-2 681 472, consists of submitting a wafer of the required semiconducting material and with a plane surface to the following steps: by means of ions, creating a layer of micro-cavities within the thickness of the wafer and at a depth approximately equal to the ion penetration depth, this layer separating -he wafer into a lower region making up the mass of the substrate and an upper region forming the thin film, the ions being chosen to be rare gas or hydrogen gas ons, and the temperature of the wafer being kept below the temperature at which implanted ions can escape from the semiconductor by diffusion; intimate contact with a support (stiffener) composed of at least one layer of rigid material, this intimate contact possibly being made for example using an adhesive substance or by the effect of a preliminary surface preparation and possibly a heat and/
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patent: 4442178 (1984-04-01), Kimura et al.
patent: 5769941 (1998-06-01), Chiou
patent: 5792566 (1998-08-01), Young et al.
Commisariat A L'Energie Atomique
Hiteshew Felisa
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