Electricity: measuring and testing – Fault detecting in electric circuits and of electric components – Of individual circuit component or element
Reexamination Certificate
1999-03-11
2001-09-25
Nguyen, Vinh P. (Department: 2858)
Electricity: measuring and testing
Fault detecting in electric circuits and of electric components
Of individual circuit component or element
C324S765010
Reexamination Certificate
active
06294919
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to a method for non-destructive measurement by means of a beam of radiant energy, and a corresponding induced signal current, dopant impurity concentrations which may vary along the length of certain semiconductor devices, such as lateral double diffused metal oxide semiconductor (LDMOS) transistors which are designed for high voltage (HV) applications.
BACKGROUND OF THE INVENTION
It is well known that an induced current can be generated in a semiconductor having a p-n junction or Schottky Barrier (metal-semiconductor rectifying contact) by shining a focused beam of radiation of above bandgap energy on the body of the semiconductor. Apparatus for generating such beams and for scanning them across a device under test (DUT) are commercially available. In the case of a large area device, such as a high-voltage HV LDMOS transistor (which typically is ten or more microns in length) it is convenient to use a laser beam focused through an optical microscope to illuminate and scan the device. It is to be understood however that other radiant energy beams, such as an electron beam (EBIC), can be used for this purpose and are the method of choice for small electronic devices.
High voltage HV LDMOS devices, particularly those fabricated utilizing the reduced surface electric field (RESURF) principle, generally require very specific (e.g., linearly increasing) doping profiles in the drift region of the device. A voltage-capacitance relationship internally of a LDMOS transistor determines a space charge region depletion width “W” in the transistor as a function of an applied reverse bias voltage as the transistor is scanned by a laser (or other radiant energy) beam. This reverse bias voltage determines how many trapped positive (donor) ions can be uncovered in the graded-dopant n-type drift region of the transistor and results in a fixed depletion width W for each applied voltage. As will be explained in greater detail hereinafter a beam-induced photocurrent signal from the LDMOS device under reverse bias allows the measurement of the depletion width W as a function of applied reverse bias voltage.
It is desirable to be able to make quick, accurate and non-destructive measurement of dopant impurity concentrations and profiles along the length of certain semiconductor devices such as LDMOS transistors. This provides for the rapid monitoring of the design and functionality, and the manufacturing processes for such devices. Prior to the invention, so far as is known, no one had utilized a radiant beam scanning system for such measurements.
SUMMARY OF THE INVENTION
In accordance with one illustrative embodiment of apparatus for carrying out the method of measurement provided by the invention, a device under test (DUT) such as a high voltage HV LDMOS transistor, is reverse biased and is scanned along its drift region length by a laser beam of suitable wavelength and intensity, focused onto the DUT through a microscope. An optical beam induced current (OBIC) signal is obtained and by the amplitude of the OBIC signal and the beam position along the length of the DUT a respective depletion width (W) is determined for each of a number of values of reverse bias voltage. From these measurements the corresponding dopant impurity concentration (e.g., of phosphorous atoms) for each measured depletion width W is obtained using a mathematical algorithm. This allows determination of a profile of the dopant impurity concentrations as a function of drift region distance or depletion width W in the LDMOS device.
An OBIC laser-microscope system does not directly measure internal capacitance of the p-n junction between p+ body and n-type drift region of an LDMOS transistor by conventional electrical measurements, but measures instead the depletion layer capacitance via the space charge region depletion width W. This is another way of measuring the junction depletion layer capacitance resulting from the fixed charge of the uncovered ionized impurity atoms in the space charge region. A mathematical equation (described in detail hereinafter) is formulated in a way applicable to the case of OBIC measurements of the DUT to describe the incremental junction capacitance as a function of reverse bias voltage in terms of the space charge region depletion width W and its derivatives.
For a high voltage HV LDMOS transistor, where the RESURF condition is utilized, the situation is more complex. In a RESURF device the space charge region is further extended in order to achieve higher breakdown voltages by simultaneously depleting vertically from the p-n junction in the device and also horizontally from a substrate oxide layer via an MOS capacitance for the given example of an HV LDMOS device fabricated in SOI (silicon-on insulator) technology. Here the added MOS capacitance from the substrate (consisting of the oxide layer capacitance and the depletion layer capacitance in series) lies in parallel with the depletion layer capacitance of the p-n junction between the p+type body and n-type drift region as will be described hereinafter. The depletion layer capacitance of the p-n junction gives only a negligible contribution in this case, since the area of the p-n junction capacitor is negligibly small in comparison with the oxide layer capacitance. In other words, the MOS capacitance formed by the device substrate and the insulating oxide layer completely dominates the depletion width W in the drift region of the device. Accordingly, as will be explained hereinafter, a further extended mathematical algorithm is derived by means of which are determined in accordance with the invention dopant impurity concentrations in HV LDMOS transistors in SOI technology utilizing the RESURF principle.
In accordance with an aspect of the invention there is provided a method for non-destructive measurement of dopant concentrations in the drift region of semiconductor devices, such as LDMOS transistors. The method comprises a first step of reverse biasing a device under test (DUT) with a first voltage, a second step of scanning the device with a beam of radiant energy to induce in the DUT a signal current which varies as the beam scans along the DUT and is used to measure a first depletion width (W) in the DUT, additional steps of repeating the first and second steps using a plurality of separate bias voltages and measuring respective depletion widths W in the DUT, and a final step of determining from the voltages and the widths W a profile of dopant impurity concentrations in the DUT.
In accordance with another aspect of the invention there is provided a method for determining dopant impurity concentrations (N
D
) at points along the length of a semiconductor device such as a high voltage lateral double diffused metal oxide semiconductor (HV LDMOS) transistor which has internal capacitance (C). The method comprises the steps of: reverse biasing the device with a voltage V which can be varied over a wide range until the onset of avalanche breakdown of the device; scanning along a length of the device with a beam of radiant energy to produce in the device a beam induced current signal; using the induced signal to measure a depletion width W in the device for a respective voltage V, the induced OBIC photocurrent signal having a high generally constant value within a region of the depletion width W and decaying generally to zero outside the region, the depletion width W increasing as bias voltage V in increased; repeating the above steps with different bias voltages to establish a series of such voltages V and respective widths W; and determining from interrelationships of voltage V, width W, capacitance (C) and dopant concentration N
D
the respective dopant concentrations ND at points along the length of the device.
A better understanding of the invention together with a fuller appreciation of its many advantages will best be gained from a study of the following description and claims given in conjunction with the accompanying drawings.
REFERENCES:
patent: 4456979 (1984-06-01), Kleinknec
Brandeau Edward
Infineon - Technologies AG
Nguyen Vinh P.
Ostroff Irwin
LandOfFree
Method for nondestructive measurement of dopant... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for nondestructive measurement of dopant..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for nondestructive measurement of dopant... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-2522245