Method for multiplying a multiplicand and a multiplier according

Details Method for multiplying a multiplicand and a multiplier according Method for multiplying a multiplicand and a multiplier according

1997-08-08

1999-08-24

Malzahn, David H.

Electrical computers: arithmetic processing and calculating

Electrical digital calculating computer

Particular function performed

708628, G06F 752

Patent

active

059419423

ABSTRACT:
In a modified Booth's algorithm only one shift unit is required for multiplication of the partial products. This is based on the known coding prescriptions of the Booth's algorithm, which respectively determines from 3 bits of the multiplier how the partial products are to be produced. From the respective 3 bits of the multiplier of the current iteration and of the preceding iteration, it is determined whether the partial product used for the next iteration has to be multiplied by 1/2, 1/4 or 1/8. For this purpose, a coding table and a multiplier that operates according to this principle are provided.

REFERENCES:
patent: 4807175 (1989-02-01), Tokumaru et al.
patent: 5220525 (1993-06-01), Anderson et al.
patent: 5226003 (1993-07-01), Nagamatsu
patent: 5457804 (1995-10-01), Ohtomo
Proceedings of the IRE, O.L. MacSorley, High-Speed Arithmetic in Binary Computers, vol. 49, pp. 67-91.
IEEE Transactions on Computers, Oct. 1975, L.P. Rubinfield, A Proof of the Modified Booth's Algorithm for Multiplication, pp. 1014-1015.
Proceedings of ISCAS, 1985, Anton Stolzle et al, Parallel-Serial Multiplication Using Booth's Algorithm and Horner's Scheme, pp. 1389-1390.

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