Metal working – Method of mechanical manufacture – Electrical device making
Reexamination Certificate
2002-02-28
2004-09-28
Arbes, Carl J. (Department: 3729)
Metal working
Method of mechanical manufacture
Electrical device making
C029S825000, C029S832000, C438S610000, C438S612000, C438S613000
Reexamination Certificate
active
06796025
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to a method for mounting an electronic part and a paste material, and more particularly to the method for mounting an electronic part in which a projection electrode of an electronic part is welded by fusion to a connection terminal of a mounting substrate in a flip-chip bonding scheme, and the paste material used in the method.
Recently, as represented by a cellular phone or the like, an electronic part such as a semiconductor device has been improved in terms of reduced size, higher density, and speed. In response to these improvements, a flip-chip bonding scheme has been more frequently used in that a projection electrode such as a solder bump is used as an external connection terminal of the electronic part and the projection electrode is joined to a mounting substrate so as to electrically connect the mounting substrate to the electronic part.
According to this flip-chip bonding scheme, compared with a bonding scheme using lead, since the surface area needed to mount the electronic part can be smaller, it is possible to realize a minimization of the size and a higher density placement. Moreover, it is possible to improve a rate in which a wiring length between the electronic part and the mounting substrate can be shortened.
2. Description of the Related Art
As a flip-chip bonding method for bonding an electronic part having a projection electrode such as a solder bump, a conventional bonding method has been used in that the electronic part is attached to a bonding tool, adjusted at a bonding position on a mounting substrate, and pressed and heated so that a solder bump is contacted and melted so as to be joined. However, since the conventional bonding method individually processes the electric part, the conventional bonding method is less effectively than a surface bonding reflow soldering method.
In contrast to the conventional bonding method, in order to improve operational efficiency, another conventional method similar to a general surface bonding reflow soldering method is also applied in that a solder paste is printed on a connection terminal of the mounting substrate, the solder bump of the electronic part is aligned to be located where the solder paste is printed, and the solder bump is melted by a reflow process to be joined. This method is hereinafter called a first conventional technology.
FIGS. 1A
,
1
B,
1
C, and
1
D are diagrams showing a mounting method according to the first conventional technology.
In
FIG. 1A
, a state where a solder paste
5
is printed to a mounting substrate
3
is shown. The solder paste
5
having a volume ratio of a solder grain of about 50% is generally used. This solder paste
5
is arranged on a connection terminal
4
of the mounting substrate
3
using a screen printing method.
Subsequently, a solder bump
2
of a semiconductor device
1
is aligned to the connection terminal
4
of the mounting substrate
3
, and as shown in
FIG. 1B
, the semiconductor device
1
is mounted on the mounting substrate
3
. Thereby, the semiconductor device
1
is temporarily fixed on the mounting substrate
3
by the solder paste
5
.
Subsequently, the mounting substrate
3
where the semiconductor device
1
is temporarily fixed is passed through a reflow furnace, and the solder bump
2
is melted to join to the connection terminal
4
. In
FIG. 1C
, the solder bump
2
is joined to the connection terminal
4
. When the solder bump
2
is completely joined to the connection terminal
4
by the reflow process, unremoved flux is washed off if needed. As shown in
FIG. 1D
, the semiconductor device
1
is completely mounted to the mounting substrate
3
.
On the other hand, by utilizing a fact that the bump itself is solder, another method is also applied in that only flux is coated on a mounting substrate or at an end of a solder bump, and the electronic part is mounted on a mounting substrate by the reflow process. This method is hereinafter called a second conventional technology. Another mounting method will be described according to this second conventional technology with reference to
FIGS. 2A
,
2
B,
2
C and
2
D. Also in
FIGS. 2A
,
2
B,
2
C, and
2
D, an example using the semiconductor device
1
as the electronic part is shown.
FIG. 2A
is a diagram showing a state where flux
18
is printed to a mounting substrate
13
. Different from the solder paste
15
in
FIG. 1A
, the flux
18
does not contain the solder grain. The flux
18
is arranged to completely cover the upper surface of the mounting substrate
13
.
Subsequently, the solder bumps
12
of the semiconductor device
11
are adjusted to be aligned to the connection terminals
14
of the mounting substrate
13
, respectively. As shown in
FIG. 2B
, the semiconductor device
11
is mounted on the mounting substrate
13
. Thereby, the semiconductor device
11
is temporarily joined to the mounting substrate
13
by the flux
18
.
The mounting substrate
13
where the semiconductor device
11
is mounted on the mounting substrate
13
is passed through the reflow furnace. The solder bumps
12
are melted to join to the connection terminals
14
.
FIG. 2C
is a diagram showing a state where the solder bumps
12
are joined to the connection terminals
14
. When the solder bumps
12
are completely joined to the connection terminals
14
by the reflow process, residue flux is washed off if needed. Thereby, as shown in
FIG. 2D
, the semiconductor device
11
is completely mounted to the mounting substrate
13
.
However, in the first conventional technology, a technology is required to minutely print each solder paste
5
on each connection terminal
4
of the mounting substrate
3
. In a case in which the printing process is not properly performed, a bridge part
6
between the connection terminals
4
is produced (see FIG.
1
C and FIG.
1
D). Also, a poor joint between the solder bump
2
and the connection terminal
4
is caused.
In the solder paste
5
whose volume ratio of the solder grains is about 50%, in a case in which a bump pitch of the semiconductor device
1
is less than 150 micrometers, it is difficult to properly print each solder paste
5
to each minutely formed connection terminal
4
corresponding to this bump pitch. Furthermore, the semiconductor device
1
being mounted must be stably attached at a predetermined mounting position on the mounting substrate
3
until the reflow process is completed. However, it is difficult for a minute amount of the solder paste
5
printed on connection terminals
4
to sufficiently maintain the attachment.
On the other hand, in the second conventional technology described above, since an allowance for a flatness of the solder bump
2
in relation to the mounting substrate
3
is small, the connection terminals
4
of the mounting substrate
3
may not be joined with the solder bumps
2
. That is, a variation in a diameter inevitably exists in the solder bumps
2
(shown by an arrow &Dgr;H in FIG.
2
A). For this reason, such as a solder bump
12
B shown in
FIG. 2A
, if a diameter of the solder bump
12
is smaller than that of a normal solder bump
12
A, a space occurs between the solder bump
2
B and the connection terminal
4
.
In the mounting method according to the first conventional technology shown in FIG.
1
A through
FIG. 1D
, since the solder paste
5
contains solder grains as about 50% of the volume ratio of the solder paste
5
, even if the space occurs between the solder bump
2
and the connection terminal
4
when the solder grain fuses in a heating process, fused solder grain fills the space. Accordingly, the space as a problem does not occur in the mounting method according to the first conventional technology.
However, in the mounting method according to the second conventional technology shown in FIG.
2
A through
FIG. 2D
, since the solder grain does not exist in the flux
18
, when a space is formed between the solder bump
12
B and the connection terminal
14
because of the variation of a diameter of
Akamatsu Toshiya
Fujimoto Yasunori
Imamura Kazuyuki
Yamaguchi Osamu
Arbes Carl J.
Fujitsu Limited
Westerman Hattori Daniels & Adrian LLP
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