Method for mounting a semiconductor chip on a substrate, and...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip

Reexamination Certificate

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C257S678000

Reexamination Certificate

active

06333561

ABSTRACT:

BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a method for mounting a semiconductor chip on a substrate and to a semiconductor device that is adapted for mounting on a substrate.
2. Description of the Related Art
With the rapid advancement in semiconductor fabrication technology, the bonding pads on the surface of a semiconductor chip are getting smaller in size, and the distances between adjacent bonding pads are getting shorter. These can create difficulty when connecting the semiconductor chip to an external circuit, and can affect adversely the production yield.
In co-pending U.S. patent application Ser. No. 09/520,719 the applicant disclosed a semiconductor device that is adapted for mounting on a substrate having a chip-mounting region provided with a plurality of solder points. The semiconductor device includes a semiconductor chip having a pad-mounting surface provided with a plurality of bonding pads which are disposed on the pad-mounting surface at locations that are offset from locations of corresponding ones of the solder points on the chip-mounting region. Conductive bodies are formed on the pad-mounting surface to establish the required electrical connection among the bonding pads and the corresponding ones of the solder points.
SUMMARY OF THE INVENTION
The main object of the present invention is to provide a method of the type disclosed in the aforesaid co-pending U.S. patent application for mounting a semiconductor chip on a substrate so as to overcome the aforesaid drawback.
Another object of the present invention is to provide a semiconductor device of the type disclosed in the aforesaid co-pending U.S. patent application and adapted for mounting on a substrate so as to overcome the aforesaid drawback.
According to one aspect of the present invention, there is provided a method for mounting a semiconductor chip on a substrate. The substrate has a chip-mounting region provided with a plurality of solder points. The semiconductor chip has a pad-mounting surface provided with a plurality of bonding pads, which are to be connected to corresponding ones of the solder points and which are disposed on the pad-mounting surface at locations that are offset from locations of the corresponding ones of the solder points on the chip-mounting region. The method comprises the steps of:
providing a conductor-forming mold having one side formed with a plurality of conductor-receiving cavities, each of the conductor-receiving cavities having a first cavity part that is disposed in the conductor-forming mold at a location corresponding to that of a respective one of the bonding pads on the pad-mounting surface, and a second cavity part that extends from the first cavity part and that is disposed in the conductor-forming mold at a location corresponding to that of a respective one of the solder points on the chip-mounting region of the substrate;
filling the conductor-receiving cavities with a conductive metal paste to form conductive bodies respectively therein, each of the conductive bodies having an extension portion that is disposed in the first cavity part of the respective one of the conductor-receiving cavities, and an electrical connection portion that is disposed in the second cavity part of the respective one of the conductor-receiving cavities on one end of the extension portion; and
through a transfer printing unit, transferring the conductive bodies from the conductor-forming mold to the pad-mounting surface of the semiconductor chip such that the extension portion of each of the conductive bodies is connected electrically to the respective one of the bonding pads, and such that the electrical connection portion of each of the conductive bodies extends to the location corresponding to that of the respective one of the solder points on the chip-mounting region of the substrate.
According to another aspect of the present invention, a semiconductor device is adapted for mounting on a substrate having a chip-mounting region provided with a plurality of solder points. The semiconductor device comprises:
a semiconductor chip having a pad-mounting surface provided with a plurality of bonding pads which are disposed on the pad-mounting surface at locations that are offset from locations of corresponding ones of the solder points on the chip-mounting region; and
a plurality of conductive bodies, each of which has an extension portion that is connected electrically to a respective one of the bonding pads, and an electrical connection portion that is formed on one end of the extension portion and that extends to a location corresponding to that of a respective one of the solder points on the chip-mounting region of the substrate. The conductive bodies are formed by:
providing a conductor-forming mold having one side formed with a plurality of conductor-receiving cavities, each of the conductor-receiving cavities having a first cavity part that is disposed in the conductor-forming mold at a location corresponding to that of a respective one of the bonding pads on the pad-mounting surface, and a second cavity part that extends from the first cavity part and that is disposed in the conductor-forming mold at a location corresponding to that of a respective one of the solder points on the chip-mounting region of the substrate;
filling the conductor-receiving cavities with a conductive metal paste to form the conductive bodies respectively therein, the extension portions of the conductive bodies being disposed in the first cavity parts of the conductor-receiving cavities, the electrical connection portions of the conductive bodies being disposed in the second cavity parts of the conductor-receiving cavities; and
through a transfer printing unit, transferring the conductive bodies from the conductor-forming mold to the pad-mounting surface of the semiconductor chip.


REFERENCES:
patent: 5661086 (1997-08-01), Nakashima et al.
patent: 5990546 (1999-11-01), Igarashi et al.
patent: 6075712 (2000-06-01), McMahon
patent: 6114754 (2000-09-01), Kata
patent: 6143991 (2000-11-01), Moriyama

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