Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Encapsulating
Reexamination Certificate
1999-02-10
2001-09-25
Chaudhuri, Olik (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Encapsulating
C438S124000, C438S126000, C029S827000, C029S855000
Reexamination Certificate
active
06294411
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates to a semiconductor device for preventing wire deformation in molding and exposure of bonding wires to a surface of the package, a method of manufacturing the same, and molds for the method.
2. Background of the Invention
Conventionally, a lead frame and a chip are normally set at the center of the package in a TSOP (Thin Small Outline Package) having an LOC (Lead On Chip) structure including bus bars. For this reason, a surface of the lead frame shifts from the center of the package to the upper side, so the distance from the surface of the lead frame to a surface of the package becomes short. To prevent bonding wires from being exposed to the surface of the package, in wire bonding, restriction on loops, and accuracy and stability of the height of the wires are required. To meet this requirement, wire bonding is performed by appropriately selecting the apparatus, capillary, wire material, and the like.
In addition, since the bonding wires must be bridged low, the interval between the bus bar and the wire decreases. In this case, even when slight wire deformation happens in molding, the wires touch the bus bars. Therefore, transfer conditions are selected to prevent wire deformation.
In the above-mentioned related art, however, the bonding wires may be exposed to the surface of the package. Additionally, since wire deformation readily happens, the wires may touch the bus bars.
SUMMARY OF THE INVENTION
It is an object of the present invention to provide a semiconductor device capable of preventing wire deformation and exposure of bonding wires to a surface of the package, a method of manufacturing the same, and molds for the method.
According to an aspect of the present invention, there is provided a semiconductor device comprising a semiconductor chip, a lead for inputting/outputting an electrical signal to/from the semiconductor chip, a bonding wire for electrically connecting the lead to the semiconductor chip, and a resin for encapsulating the bonding wire, the lead, and the semiconductor chip while partially exposing the lead to an outside of the resin, wherein the resin encapsulates the bonding wire without exposing the bonding wire to the outside of the resin and has a surface contacting the outside, and the surface of the resin has a mark of one of recessed and projecting shapes at the closest portion to the bonding wire.
Preferably, the mark is formed by a resin encapsulating mold.
According to another aspect of the present invention, there is provided a method of manufacturing a resin-encapsulated semiconductor device whose package is formed by covering a semiconductor chip with a resin, comprising the first step of connecting a pad of the semiconductor chip mounted on a lead frame to an inner lead of the lead frame by a bonding wire, the second step of, using molds constituted by an upper mold having a mold cavity moving unit which can move upward/downward and a lower mold integrated with the upper mold to form an inner space, setting a portion including the semiconductor chip and the bonding wire in the inner space of the molds. The third step moves the mold cavity moving unit downward to press an upper portion of the bonding wire and filling the inner space of the molds with the resin while regulating the wire height, and the fourth step of returns the mold cavity moving unit to a surface position of the package and fills a nonfilling space formed by returning the mold cavity moving unit with the resin.
Preferably, in the fourth step, the nonfilling space is filled with the resin before the resin in the molds is cured.
Preferably, the inner space is filled with the resin by the mold cavity moving unit.
According to still another aspect of the present invention, there is provided molds for manufacturing a semiconductor device whose package is formed by covering a semiconductor chip with a resin, comprising an upper mold having a mold cavity moving unit which can move upward/downward, and a lower mold integrated with the upper mold to form an inner space.
Preferably, an anti-slip process is performed on at least a surface of the mold cavity moving unit which contacts a bonding wire connected to the semiconductor chip.
Preferably, the anti-slip process is a satin process.
Preferably, the inner space is filled with the resin by the mold cavity moving unit.
According to the present invention, before resin filling, the bonding wires are pressed by the mold cavity moving unit to regulate the height of the bonding wires, thus preventing the bonding wires from being exposed to the surface of the package after molding. As a result, the loop shape of the bonding wire is corrected and fraction defects can be lowered.
Furthermore, according to the present invention, when the mold cavity moving unit moves downward to bring its lower portion into contact with the upper ends of the bonding wires, frictional force increases between the bonding wire and the mold cavity moving unit by the anti-slip portion, thus preventing slip. This prevents the bonding wires from moving in the horizontal direction, what is called wire deformation. As a result, since the height of the bonding wires is properly regulated, the loop shape of the bonding wire is corrected and fraction defects can be lowered.
Furthermore, according to the present invention, the finely processed satin surface properly comes in contact with the bonding wires to prevent slip between the bonding wire and the mold cavity moving unit, thus effectively preventing wire deformation. As a result, since the height of the bonding wires is properly regulated, the loop shape of the bonding wire is corrected and fraction defects can be lowered. Since wire deformation need not be taken into consideration, transfer speed of resin and throughput of the apparatus can be increased.
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Chambliss Alonzo
Chaudhuri Olik
Connolly Bove Lodge & Hutz
Nippon Steel Semiconductor Corporation
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