Semiconductor device manufacturing: process – Making device or circuit emissive of nonelectrical signal – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2000-04-24
2002-03-05
Bowers, Charles (Department: 2822)
Semiconductor device manufacturing: process
Making device or circuit emissive of nonelectrical signal
Packaging or treatment of packaged semiconductor
C438S025000, C438S031000
Reexamination Certificate
active
06352873
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention (Technical Field)
The present invention relates to laser diodes, particularly to a laser diode assembly which promotes accurate spacing and alignment of diode bars, cooling of diode bars and electrical conductivity through the diode bars, as well as modularized assembly and pre-testing.
2. Background Art
Laser diode arrays are in general use in a wide variety of industrial and research applications. Pluralities of diode bars are mounted up on a substrate to provide the multiplied power of numerous bars, versus the effect offered by a single bar. To optimize the efficiency of a multiple diode bar array, it is desirable not only that the diode bars be properly aligned so that their emitter surfaces face the same direction, but electrical conductivity between bars and cooling of the bars should be optimized.
Most efforts in the art have focused upon modes and means of mounting numerous diode bars quickly and inexpensively. The mounting of numerous bars into a single array historically has been a somewhat labor and/or cost intensive proposition, thus partially impeding the development of economical products and devices incorporating laser diode arrays.
U.S. Pat. Nos. 5,040,187 and 5,284,790, both to Karpinski, show a “monolithic” laser diode array. The disclosure teaches a substrate having a number of grooves therein, and into which the diode bars are inserted. The substrate ostensibly is flexed into an arc to widen the grooves; the diode bars are inserted into the temporarily widened grooves, after which the substrate is relaxed and allowed elastically to return to its normal shape, which results in an effective narrowing of the grooves thereby to help hold the inserted diodes in place. A variety of “submounts” for the array also are taught. However, the methods and configurations of the disclosures are not conducive to diode bar alignment, as the bars tend to tip and roll within the grooves during assembly.
U.S. Pat. No. 5,128,951 to Karpinski also shows a particular type of laser diode array and method of fabrication. The disclosure has to do with providing an inexpensive mode of manufacturing a diode bar array. A substrate is provided with two layers, an upper conductive layer immediately above and in flush contact with a lower non-conductive layer. The grooves for receiving the diode bars are cut into the substrate so as to completely pierce the upper layer and penetrate into the lower non-conductive layer. The disclosure purports thereby to provide a means for mounting diode bars which promotes conductivity between bars while also providing heat transfer into the lower electrically insulating layer. The diode bars do not have optimal contact with the “heat sink” lower layer, and maximized alignment of the bars in the grooves also is not taught.
U.S. Pat. No. 5,305,344 to Patel discloses a laser diode array. The disclosure teaches diversity in diode bar packing, and a configuration which possibly eases the replacement of defective individual bars, but is comparatively complex and expensive.
U.S. Pat. No. 5,311,535 to Karpinski shows a laser diode array which provides for laser emission from the minor surfaces of the diode bars. The device involves the disposition of diode bars into a grooved substrate. Diode bar alignment is not carefully optimized.
Other United States patents of interest in the field include U.S. Pat. No. 5,644,586 to Kawano et al.; U.S. Pat. No. 5,627,850 to Irwin et al.; U.S. Pat. No. 5,568,498 to Nilsson; U.S. Pat. No. 5,497,391 to Paoli; U.S. Pat. No. 5,418,799 to Tada; U.S. Pat. No. 5,440,577 to Tucker; U.S. Pat. No. 5,394,426 to Joslin; U.S. Pat. No. 5,212,707 to Heidel et al.; U.S. Pat. No. 5,105,430 to Mundinger et al.; U.S. Pat. No. 5,031,187 to Orenstein et al.; U.S. Pat. No. 5,061,974 to Onodera et al; U.S. Pat. No. 5,060,237 to Peterson; U.S. Pat. No. 4,980,893 to Thornton et al.; U.S. Pat. No. 4,947,401 to Hinata et al.; U.S. Pat. No. 4,903,274 to Taneya et al.; U.S. Pat. No. 4,881,237 to Donnelly; and U.S. Pat. No. 4,092,614 to Sakuma et al. Nevertheless, a need remains for a means and method of providing a laser diode array which at once is simple and economical, and yet optimizes proper diode bar alignment to promote emission efficiency without sacrificing efficient electrical conductivity between, and cooling of, the diode bars. Further, there is a need, addressed by the present invention, for a modular method of laser diode assembly that permits submodules of an assembly to be individually tested and/or replaced. Against this background, the present invention was developed.
SUMMARY OF THE INVENTION (DISCLOSURE OF THE INVENTION)
The invention includes a wedged array embodiment of a diode bar assembly, a stacked array embodiment, and methods and apparatus for assembling the stacked and wedged arrays.
More specifically, the invention includes a method for assembling a diode bar assembly. An aspect of the method is the construction of a plurality of diode submodules, each submodule assembled by the steps of: (a) locating a first conductive spacer upon a planar working surface; (b) disposing a first solder preform, having a melting temperature, upon the first conductive spacer; (c) placing a diode bar upon the first solder preform; (d) disposing a second solder preform having a melting temperature upon the diode bar; (e) placing a second conductive spacer upon the second solder preform; (f) compressing the spacers, preforms and diode bar parallel together; (g) heating the solder preforms above their melting temperatures; and (h) allowing the melted solder preforms to harden by cooling, thereby bonding the spacers to the diode bar, and wherein the spacers bonded to the diode bar define a diode submodule. The step of compressing may comprise disposing a weight upon the second spacer. The step of heating preferably comprises placing the submodule in a controlled heat source while compressing the spacers, solder preforms, and diode bar.
The inventive method further comprises the assembly of a plurality of submodules into a diode bar array, comprising the step of affixing a plurality of diode submodules, prepared according to steps (a)-(h) above, upon a substrate, the substrate being provided with a plurality of conductive strips, wherein after affixing the conductive strips are in electrical contact with respective solder preforms; and wherein the plurality of submodules affixed to the substrate define a diode bar array. The plurality of conductive strips preferably comprise solder having a melting temperature less than the melting temperatures of the solder preforms, wherein the step of affixing comprises the steps of: (a) heating the plurality of submodules, the conductive strips, and the substrate to a temperature between the melting temperature of the conductive strips and the lowest melting temperature of the solder preforms; and (b) allowing the melted conductive strips to harden by cooling, thereby bonding the submodules to the substrate. Alternatively, where the plurality of conductive strips comprise solder pre-applied to the substrate, the step of affixing may comprise the step of applying epoxy glue between the submodules and the substrate.
Thus there is disclosed a method for assembling a diode bar array, which comprises overall steps of: (a) locating a first conductive spacer upon a planar working surface; (b) disposing a first solder preform, having a melting temperature, upon the first conductive spacer; (c) placing a diode bar upon the first solder preform; (d) disposing a second solder preform having a melting temperature upon the diode bar; (e) placing a second conductive spacer upon the second solder preform; (f) compressing the spacers, preforms and diode bar parallel together; (g) heating the solder preforms above their melting temperatures; (h) allowing the melted solder preforms to harden by cooling, thereby bonding the spacers to the diode bar, and wherein the spacers bonded to the diode bar define a diode submodule; and (i) affixing a plurality of diode submodules prepar
Baker Rod D.
Bowers Charles
Decade Products, Inc.
Kebede Brook
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