Semiconductor device manufacturing: process – Making device array and selectively interconnecting – Using structure alterable to conductive state
Reexamination Certificate
2005-05-10
2005-05-10
Pert, Evan (Department: 2829)
Semiconductor device manufacturing: process
Making device array and selectively interconnecting
Using structure alterable to conductive state
Reexamination Certificate
active
06890802
ABSTRACT:
A method is provided for tuning (i.e. modifying, changing) the impedance of semiconductor components or devices using a focused heating source. The method may be exploited for finely tuning the impedance of semiconductor components or devices, by modifying the dopant profile of a region of low dopant concentration (i.e. increasing the dopant concentration) by diffusion of dopants from adjacent regions of higher dopant concentration through the melting action of a focused heating source, for example a laser. The present invention is in particular directed to the use of lasers in relation to circuits for the creation of conductive links and pathways where none existed before. The present invention more particularly relates to a means wherein impedance modification (i.e. trimming or tuning) may advantageously be carried out as a function of the location of one or more conductive bridge(s) along the length of a gap region.
REFERENCES:
patent: 5110758 (1992-05-01), Baskett
patent: 6329272 (2001-12-01), Savaria et al.
patent: 0 472 331 (1992-02-01), None
patent: 59100646 (1984-05-01), None
Parker D L et al: “Polysilicon Resistor trimming by laser link making” IEEE Transactions on semiconductor manufacturing, IEEE inc. New York, US, vol. 3, No. 2, May 1, 1990 pp. 80-83.
Gagnon Yves
Lacourse Alain
Langlois Hugues
Savaria Yvon
BCF LLP
Kosie Ronald S.
Ltrim Technologies Inc.
Pert Evan
Prince Gaetan
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