Excavating
Patent
1991-06-03
1994-02-15
Beausoliel, Jr., Robert W.
Excavating
371 683, 371 54, 371 91, G06F 1120, G06F 1540
Patent
active
052874923
ABSTRACT:
A method for modifying a fault-tolerant processing system (FTS) including a pair of partner sets of two processors (PA1/PA2; PB1/PB2) operating in microsynchronization at a first or low processing frequency (FL) and connected to a respective system bus (BA; BB) operating at a bus clock frequency (FB) lower than the first processing frequency (FL). The method consists in:
REFERENCES:
patent: 3557315 (1971-01-01), Kobus et al.
patent: 3761884 (1973-09-01), Avsan et al.
patent: 3810119 (1974-05-01), Zieve et al.
patent: 3833798 (1974-09-01), Huber et al.
patent: 4198678 (1980-04-01), Maatje et al.
patent: 4569017 (1986-02-01), Renner et al.
patent: 4797884 (1989-01-01), Yalowitz et al.
patent: 4945486 (1990-07-01), Nitschke et al.
ALCATEL N.V.
Beausoliel, Jr. Robert W.
De'cady Albert
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