Method for modeling bidirectional or multiplicatively driven sig

Details Method for modeling bidirectional or multiplicatively driven sig Method for modeling bidirectional or multiplicatively driven sig

1993-06-14

1995-10-03

Treat, William M.

Boots, shoes, and leggings

36447424, 364490, 364578, 364DIG1, G06F 9455

Patent

active

054559286

ABSTRACT:
A method is disclosed whereby systems having bidirectional and/or multiplicatively driven data paths are statically scheduled for simulation. The method flattens the netlist to convert bidirectional data flow paths into unidirectional, multiplicatively driven data paths. All drivers connected to multiplicatively driven data paths (or nets) are isolated from the net using a bus resolution block. The bus resolution block implements a resolution function which permits the system to be statically scheduled for simulation. Simulation speed is increased substantially thereby.

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Ho et al., "High Level Data Flow Programming for Digital Signal Processing", VLSI Signal Processing III, 1988, IEEE, pp. 385-395.
Ha et al., "Quasi-static Scheduling for Multiprocessor DSP", Circuits and Systems, 1991 IEEE International Symposium, pp. 352-355.
Edward A. Lee, "Consistency in Data Flow Graphs", Application Specific Array Processors, 1991 International Conference, IEEE, pp. 355-369.
Dorothy Janson, "A Static Scheduler for the Computer Aided Prototyping System", Computer Assurance: Compass '88, IEEE, pp. 92-98.
Zein et al., "HLSIM-A New Hierarchical Logic Simulator in APL", VLSI Test Symposium, 1992 IEEE, pp. 333-338.
Fischer et al., "NETHDL: Abstraction of Schematics to High-Level HDL", European Design Automation Conference, 1990, IEEE, pp. 90-96.

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