Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Reexamination Certificate
2001-06-13
2004-08-10
Goudreau, George A. (Department: 1763)
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
C438S710000, C438S715000, C438S720000, C216S067000, C216S071000, C216S075000
Reexamination Certificate
active
06774046
ABSTRACT:
FIELD OF THE INVENTION
The present invention is directed to a method for minimizing the critical dimension growth of a feature on a semiconductor wafer.
BACKGROUND OF THE INVENTION
The critical dimension (CD) of a feature on a semiconductor wafer is the width of that feature. The pitch is generally defined as the critical dimension plus the distance to the next feature.
For semiconductor processing methodology using etch techniques, a photoresist layer is deposited on top of a material to be etched. The photoresist layer defines the desired features, masking the portion of the layer which is not to be etched and leaving exposed the portion to be etched. During the etching process, materials from a portion of the layer which is etched as well as compounds formed by a combination of the etchant gases and the materials of the layer to be etched, can tend to coat the sides of the desired feature and thereby increase the critical dimension of the feature beyond that defined immediately under the photoresist mask. Such growth of the critical dimension can disadvantageously diminish the distance between the features and adversely affect the functionality of the features.
Accordingly, there is a need to provide a semiconductor processing methodology which allows for the desired features to be appropriately etched without causing a growth of the critical dimension of the feature during the etching process.
SUMMARY OF THE INVENTION
The present invention provides for a methodology which allows for etching of features while minimizing the growth of the critical dimension of the feature during the etched process. The method of the invention determines a direct correlation between the temperature of the wafer during the etch process and the growth of the critical dimension of a feature. In particular, it has been found that the growth of the critical dimension of a feature can be minimized by elevating the temperature of the wafer during the semiconductor processing.
Accordingly, it is an object of the present invention to control and minimize the growth of the critical dimension of a feature on a semiconductor wafer.
It is a further object of the present invention to minimize the growth of the critical dimension by increasing the temperature of the wafer to a level which discourages the growth of the critical dimension.
It is a further object of the present invention to control the critical dimension of the feature during an etch process by controlling the temperature of the wafer.
It is another object of the present invention to minimize the growth of the critical dimension by reducing heat transfer from a chuck holding the wafer in order to increase the temperature of the wafer.
It is still a further object of the present invention to control the critical dimension of the feature by heating a chuck in order to raise the temperature of the wafer.
It is still a further object of the present invention to perform the methodology of minimizing the critical dimension of a feature during a low pressure semiconductor etch process conducted in the millitorr range with the backside of a wafer kept in contact with a source of gas in the about zero to about 10 torr range in order to reduce the cooling of the wafer due to reduced heat transfer through the gas.
Accordingly, the invention included the method for minimizing the critical dimension growth of a feature located on a wafer during an etch process including the steps of placing a wafer on a chuck in an etch reactor and etching the wafer in the etch reactor. The method further includes allowing the temperature of the wafer to climb to the range of about 130° C. to about 300° C. in order to minimize the critical dimension growth of the feature located on the wafer.
In another aspect of the invention, the method for minimizing critical dimension growth of a feature located on the wafer during an etch process includes the steps of placing a wafer on a chuck in a etch reactor and controlling the temperature of a wafer by maintaining a gas in contact with a backside of the wafer.
The process further includes etching a wafer in the etch reactor and allowing the temperature of a wafer rise in order to minimize the critical dimension growth of a feature located on the wafer by reducing the pressure of the gas in contact with the backside of the wafer.
A further aspect of the invention includes minimizing the critical dimension growth of a feature located on a wafer during an etch process including the steps of placing a wafer on a chuck in an etch reactor and controlling the heat transfer from the wafer in order to allow the temperature of the wafer to climb in order to minimize the critical dimension growth of the feature on the wafer.
Other objects, advantages, and features of the invention will be described hereinbelow and evidenced in the claims and figures.
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Cofer Alferd
DeOrnellas Stephen P.
Jerde Leslie G.
Olson Kurt A.
Rajora Paritosh
Fliesler & Meyer LLP
Goudreau George A.
Tegal Corporation
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