Method for minimizing particle generation on a wafer surface dur

Details Method for minimizing particle generation on a wafer surface dur Method for minimizing particle generation on a wafer surface dur

1993-06-15

1995-03-28

Chaudhuri, Olik

Fishing, trapping, and vermin destroying

427300, 437925, H01L 2102

Patent

active

054016924

ABSTRACT:
A wafer 2 is supported polished (active) face down in a recess formed in the upper surface of a second wafer 4 which serves as a wafer support. The two wafers 2, 4 are disposed in an atmosphere of steam at 900.degree. C. at a pressure of 500 psi which results in forming an oxide on the polished face of the wafer 2.

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Wolf, Silicon Processing for the VLSI Era, vol-1-Process Technology, 1986, pp. 519-520 and 216-218.
Tsugouchi, IEE Transactions on Electronic-Devices, ED-29, 618-621 (1979).

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