Method for metal delay testing in semiconductor devices

Details Method for metal delay testing in semiconductor devices Method for metal delay testing in semiconductor devices

1996-02-29

1998-08-18

Karlsen, Ernest F.

Electricity: measuring and testing

Fault detecting in electric circuits and of electric components

Of individual circuit component or element

G01R 3102

Patent

active

057962650

ABSTRACT:
A semiconductor device is provided having a circuit for measuring a propagation delay related to metal layers formed on the device. In one embodiment, the circuit includes a first bond pad connected to an input of a first signal path, the first signal path including a first plurality of serially connected logic gates wherein the connection between each logic gate of the first plurality is formed on a first metal layer and a second bond pad connected to an output of a second signal path, the second signal path including a second plurality of serially connected logic gates wherein the connection between each logic gate of the second plurality is formed on a second metal layer, the second signal path being in electrical communication with the first signal path.

REFERENCES:
patent: 4587480 (1986-05-01), Zasio
patent: 4712061 (1987-12-01), Lach
patent: 5068547 (1991-11-01), Gascoyne
patent: 5103120 (1992-04-01), Suzuki et al.
patent: 5148263 (1992-09-01), Hamai
patent: 5495183 (1996-02-01), Suzuki et al.
patent: 5521530 (1996-05-01), Yao et al.

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