Method for message processing on a programmable logic device

Data processing: structural design – modeling – simulation – and em – Simulating electronic device or electrical system – Circuit simulation

Reexamination Certificate

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C703S022000, C716S117000, C716S116000, C718S102000, C718S103000, C718S104000, C717S107000, C717S149000, C717S131000

Reexamination Certificate

active

08065130

ABSTRACT:
Programmable architecture for implementing a message processing system using an integrated circuit is described. In an example, configurable logic of an integrated circuit is configured to have a plurality of thread circuits and a memory. Messages are received to the integrated circuit for storage in the memory. The memory is accessed with the plurality of threads to concurrently process a plurality of the messages.

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