Method for message processing on a programmable logic device

Details Method for message processing on a programmable logic device Method for message processing on a programmable logic device

2004-01-30

2009-06-23

Shah, Kamini S (Department: 2128)

Data processing: structural design, modeling, simulation, and em

Simulating electronic device or electrical system

Circuit simulation

C703S021000, C703S022000, C703S026000, C717S127000, C717S128000, C717S129000, C717S135000, C718S107000, C718S102000, C718S106000, C718S103000, C719S313000, C719S310000, C719S312000, C709S208000, C709S201000, C709S206000, C709S223000

Reexamination Certificate

active

07552042

ABSTRACT:
Programmable architecture for implementing a message processing system using an integrated circuit is described. In an example, configurable logic of an integrated circuit is configured to have a plurality of thread circuits and a memory. Messages are received to the integrated circuit for storage in the memory. The memory is accessed with the plurality of threads to concurrently process a plurality of the messages.

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