Electrical computers and digital processing systems: processing – Architecture based instruction processing
Patent
1997-11-26
2000-07-18
An, Meng-Ai T.
Electrical computers and digital processing systems: processing
Architecture based instruction processing
712202, 712216, 395709, G06F 500
Patent
active
060921803
ABSTRACT:
In a method for scheduling instructions executed in a computer system including a processor and a memory subsystem, pipeline latencies and resource utilization are measured by sampling hardware while the instructions are executing. The instructions are then scheduled according to the measured latencies and resource utilizations using an instruction scheduler.
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Anderson Jennifer-Ann M.
Dean Jeffrey
Hicks, Jr. James E.
Waldspurger Carl A.
Weihl William E.
An Meng-Ai T.
Brinkman Dirk
Digital Equipment Corporation
Monestime Mackly
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