Electric heating – Metal heating – By arc
Reexamination Certificate
1995-12-06
2003-05-06
Heinrich, Samuel M. (Department: 1725)
Electric heating
Metal heating
By arc
Reexamination Certificate
active
06559409
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a method for the marking integrated circuits with a laser, and to an instrument pertaining thereto. Such a method enables the physical marking of circuits deemed to be defective during a testing step, so that these circuits can be optically identified, and discarded during subsequent encapsulation steps.
2. Discussion of the Related Art
The manufacture of integrated circuits comprises several steps.
First of all, the integrated circuits proper are physically made out of a silicon wafer by the methods of doping, metallization and deposition of a passivation layer (made of nitride, oxide or polysilicon oxide). These methods are well known to those skilled in the art.
Typically, a silicon wafer has a diameter of some tens of centimeters. On a wafer, a variable number of identical circuits is made, the number of circuits depending on the relative surface area of these circuits in relation to the surface area of the wafer.
Then, these circuits are generally tested by a testing machine known as a wafer prober. The principle of the test is to bring metal tips into contact with the circuit (typically at the soldering pins of wires of the circuit). By enforcing and/or measuring electrical signals pertaining to planned functional characteristics of the circuit, it is possible to compare the functioning of the circuit with a functioning deemed to be satisfactory for all these characteristics. For example, tests will be performed on the voltage produced by an internal supply, consumption, the reaction of the circuit to control signals (if, for example, the circuit must perform a program memorized in the circuit), reaction time, etc.
Once the tests have been carried out, the silicon wafer is cut out in order to individualize the circuits and these circuits are encapsulated, i.e. they are packaged.
If the testing of at least one characteristic reveals a form of behavior on the part of the circuit that is not acceptable in terms of the characteristics guaranteed by the manufacturer, this circuit must be removed, after the cutting-out stage, from the manufacturing line so that it is not subsequently packaged and used in an application.
To do this, the circuit is physically marked, i.e. its external appearance is modified so that it can be subsequently recognized as being defective. The recognition is done optically by an instrument.
Conventionally, the marking is done through the deposition, by pneumatic spraying or by capillarity, of a drop of ink on the surface of the circuit, on the surface passivation layer.
This marking may be done as and when the circuits of a wafer are tested, the end of the inking device (called an inking head) being positioned between the tips of the wafer prober. The marking can also be done once all the circuits have been tested, either by the same instrument or by another instrument (using what is known as deferred inking). Since the dimensions of the circuits are tending to become ever smaller, there is a growing trend towards the use of deferred inking. In this case, the procedure uses one or more instruments exclusively dedicated to the testing of the wafers and one or more devices exclusively dedicated to the marking of those circuits of the wafers tested that are deemed to be defective. Conventionally, it is sought to use an opaque ink (black for example), the wafer being of a silvery or yellowish color.
This method has a certain number of drawbacks:
It gives rise to ink spots that are not reproducible identically. A certain degree of variation is seen in the characteristics of the ink spots. The diameter and shape of the ink spots varies as a function of extent to which the inking device brought into use (the number of spots to be made varies according to the silicon wafer). Now, the automatic machines that select the circuits in order to discard them after the cutting-out operation identify each circuit by the morphology of the ink spot, namely its diameter and shape (and not only by the presence of ink). Typically, to mark circuits having a surface area of about one square millimeter for a desired ink spot diameter of 600 microns, variations in the range of plus/minus 200 microns are observed. If the spots are too small or badly shaped, a fresh drop of ink has to be deposited by means of a manual inking device activated by an operator. This may substantially slow down the productivity of a manufacturing line.
The presence of smudges. It may happen that the ink spot spreads beyond the surface occupied by the circuit and that the ink comes into contact with neighboring circuits or with testing tips (if the test and the inking are done by one and the same instrument). This may necessitate human action or may disturb the progress of the test by introducing parasitic signals. The presence of smudges may thus induce the marking of circuits that would not have been deemed to be defective had there been no smudges.
The deposition of ink on the platform supporting the wafer during the tests, especially during the marking of circuits located on the periphery of the silicon wafer. Now, this platform is a metal platform providing for electrical continuity on the real surface of the wafer, and forming a ground plane. It is therefore necessary for an operator to remove this ink before positioning the next wafer on the platform. This gives rise to additional loss of time.
An object of the invention is to overcome at least these drawbacks.
SUMMARY OF THE INVENTION
Thus, the invention provides a method for the physical marking, on a silicon wafer, of integrated circuits deemed to be defective during a testing step so as to modify the visual appearance of the surface of these circuits, wherein the marking is done by the exposure of a surface of the circuits to a laser radiation.
The invention therefore brings about variations in the appearance of the surface of the defective circuits by the heating of this surface instead of by the deposition of a layer of ink.
Unlike the process of ink marking, laser marking provides for very high directivity of marking owing to the spatial cohesion of the laser radiation.
It is therefore possible:
to greatly reduce the variations in diameter of marking and reduce them, for example, from approximately 200 microns (with ink) to approximately 10 microns,
eliminate the risk of smudging and of marking the platform that supports the wafer.
This cohesion furthermore makes it possible to obtain a high concentration of energy per unit of surface area.
In a preferred embodiment, the circuits being covered with at least one passivation layer, the surface layers of the circuits deemed to be defective are made to melt on a depth greater than the thickness of this passivation layer.
Ink marking does not modify the structure of the circuits deemed to be defective. Ink forms a layer that is simply deposited and therefore gets superimposed on the other layers of the circuit. Owing to the risk of smudging, an ink that does not chemically modify the circuit is chosen. It is seen to it, inter alia, that the ink does not contain sodium.
During the laser marking, the change in the appearance of the surface of a circuit is obtained by the heating and melting of one or more surface layers of the circuit. The surface of the circuit will then typically have a brownish color that can be identified optically.
Owing to the great spatial cohesion of laser radiation, the marking could be destructive, i.e., the circuit could be modified so as to make it inoperative. For this purpose, it is enough to use a level of laser power and an exposure time of the surface of the circuit that are sufficient to obtain a melting of one or more active layers, located beneath the passivation layer (with a typical thickness of about 1 to 2 microns). The term “active layer” is understood to mean a layer that participates in the electrical operation of the circuit. A passivation layer is a mechanical protection layer and is independent of the function of a circuit.
Laser marking makes it possible to obtain a v
Heinrich Samuel M.
Morris James H.
SGS-Thomson Microelectronics S.A.
Wolf Greenfield & Sacks P.C.
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