Method for mapping product terms in a complex programmable logic

Details Method for mapping product terms in a complex programmable logic Method for mapping product terms in a complex programmable logic

1996-11-13

2000-07-18

Lintz, Paul R.

39550037, G06F 300

Patent

active

060918926

ABSTRACT:
A method for programming complex programmable logic devices (CPLDs) to implement a logic function, whereby user-designated locked equations of the logic function are mapped into the macrocells of a function block, and then undesignated (non-locked) equations are mapped into the remaining macrocells. The method shifts product terms between the macrocells to adjust the placement arrangement of the mapped equations, thereby obtaining a placement arrangement which is both valid and meets user-defined timing constraints.

REFERENCES:
patent: 5499191 (1996-03-01), Young
patent: 5521529 (1996-05-01), Agrawal et al.
patent: 5600569 (1997-02-01), Nishiyama et al.
patent: 5636368 (1997-06-01), Harrison et al.
Xilinx Programmable Gate Array Data Book, pp. 3-1 through 3-67, 1996, available from Xilinx, Inc. 2100 Logic Drive, San Jose, CA 95124.

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