Method for manufacturing wafer level chip stack package

Details Method for manufacturing wafer level chip stack package Method for manufacturing wafer level chip stack package

2006-12-19

2006-12-19

Nhu, David (Department: 2818)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

C438S109000

Reexamination Certificate

active

07151009

ABSTRACT:
Provided is a method for manufacturing WLCSP devices that includes preparing at least two wafers, each wafer having a plurality of corresponding semiconductor chips, each semiconductor chip having through electrodes formed in the peripheral surface region, forming or applying a solid adhesive region to a central surface region, stacking a plurality of wafers and attaching corresponding chips provided on adjacent wafers with the solid adhesive region and connecting corresponding through electrodes of adjacent semiconductor chips, dividing the stacked wafers into individual chip stack packages, and injecting a liquid adhesive into a space remaining between adjacent semiconductor chips incorporated in the resulting chip stack package. By reducing the likelihood of void regions between adjacent semiconductor chips, it is expected that a method according to the exemplary embodiments of the present invention exhibit improved mechanical stability and reliability.

REFERENCES:
patent: 6204091 (2001-03-01), Smith et al.
patent: 6340846 (2002-01-01), LoBianco et al.
patent: 6650019 (2003-11-01), Glenn et al.
patent: 6939789 (2005-09-01), Huang et al.
patent: 2001-0060223 (2001-07-01), None
patent: 2001-0068512 (2001-07-01), None

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