Method for manufacturing thin film transistor with short hydroge

Fishing – trapping – and vermin destroying

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437 41, 437937, 257 66, H01L 21336, H01L 2130

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active

054707633

ABSTRACT:
In a method for manufacturing a thin film transistor, a polycrystalline silicon layer, a gate insulating layer, a gate electrode layer, a non-doped insulating layer, and a metal connections layer are formed on a substrate, and then, a hydrogen passivation is carried out. The non-doped insulating layer has a thickness of less than approximately 100 nm.

REFERENCES:
patent: 4943837 (1990-07-01), Konishi et al.
patent: 5225356 (1993-07-01), Omura et al.
patent: 5250444 (1993-10-01), Khan et al.
I-Wei Wu et al, "Effects of Trap-State Density Reduction by Plasma Hydrogeneration in Low-Temperature Polysilicon TFT", IEEE Electronic Device Letters, vol. 10, No. 3, pp. 123-125, Mar. 1989.
-Wei Wu et al, "Performance of Polysilicon TFT Digital Circuits Fabricated with Various Processing Techniques and Device Architecture", Proceedings of the SID, vol. 31/4, pp. 311-316, 1990.

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