Method for manufacturing substrate with cavity

Details Method for manufacturing substrate with cavity Method for manufacturing substrate with cavity

2006-09-21

2009-02-24

Lebentritt, Michael S (Department: 2829)

Semiconductor device manufacturing: process

Packaging or treatment of packaged semiconductor

Assembly of plural semiconductive substrates each possessing...

C438S109000, C438S117000, C438S118000, C438S613000, C438S615000, C257SE21500, C257SE21503, C257SE21508, C257SE21511, C257SE23021, C257SE23061, C257SE23067, C257SE23068

Reexamination Certificate

active

07494844

ABSTRACT:
A method for manufacturing a substrate having a cavity is disclosed. The method comprises: (a) forming a first circuit pattern on one side of a seed layer by use of a first dry film; (b) laminating a second dry film on the first dry film, the thickness of the second dry film corresponding to the depth of the cavity to be formed; (c) laminating a dielectric layer on an area outside of where the cavity is to be formed, the thickness of the dielectric layer corresponding to the depth of the cavity to be formed; (d) laminating on the seed layer a copper foil laminated master having a second circuit pattern; and (e) forming the cavity by peeling off the first dry film and the second dry film after removing the seed layer. The method in accordance with the present invention can mount a plurality of integrated circuits by reducing the thickness of a substrate on a package on package.

REFERENCES:
patent: 6165885 (2000-12-01), Gaynes et al.
patent: 2002/0155661 (2002-10-01), Massingill et al.
patent: 2004/0178492 (2004-09-01), Tsukamoto et al.
patent: 2007/0065986 (2007-03-01), Jung et al.
patent: 2007/0065988 (2007-03-01), Jung et al.

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