Method for manufacturing SOI wafer

Details Method for manufacturing SOI wafer Method for manufacturing SOI wafer

2003-11-13

2008-10-14

Sarkar, Asok K (Department: 2891)

Semiconductor device manufacturing: process

Bonding of plural semiconductor substrates

C257SE21568

Reexamination Certificate

active

07435662

ABSTRACT:
The present invention provide a method for manufacturing an SOI wafer which suppresses voids from being generated in an SOI wafer, especially, in an outer peripheral portion thereof to achieve high productivity. According to the present invention, in a method for manufacturing an SOI wafer in which an insulating layer is formed on at least one of two wafers serving as starting wafers, and the wafer is bonded to the other wafer without an adhesive, a wafer having such an outer peripheral configuration that a configuration change width is 0.1 μm or less in a region of between 10 mm and 3 mm away from the outer periphery is used as the starting wafer.

REFERENCES:
patent: 6534380 (2003-03-01), Yamauchi et al.
patent: 1 189 266 (2002-03-01), None
patent: 05-090116 (1993-04-01), None
patent: 2001-326197 (2001-11-01), None
patent: 2001-328062 (2001-11-01), None
patent: 2001-345435 (2001-12-01), None
patent: WO-01/73831 (2001-10-01), None
PCT International Search Report for PCT/JP03/14442 mailed on Feb. 24, 2004.

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