Semiconductor device manufacturing: process – Chemical etching – Combined with the removal of material by nonchemical means
Reexamination Certificate
2011-07-19
2011-07-19
Geyer, Scott B (Department: 2812)
Semiconductor device manufacturing: process
Chemical etching
Combined with the removal of material by nonchemical means
C438S759000
Reexamination Certificate
active
07981802
ABSTRACT:
An electrical device, such as a semiconductor device, and methods of manufacturing the same. A semiconductor device having a shallow trench isolation (STI) layer may include a pad oxide layer formed over a semiconductor substrate, a trench formed over the substrate, a liner insulating layer formed over the trench, a gap-fill insulating layer formed over the liner insulating layer and a gate layer formed over the substrate. The gap-fill insulating layer may have a relatively and/or substantially planar polished surface. Methods of fabricating a semiconductor device having a shallow trench isolation (STI) layer may include performing a first chemical mechanical polishing over a gap-fill insulating layer to expose and/or target a portion of a liner insulating layer and performing a second chemical mechanical polishing over a gap-fill insulating layer to remove a portion of a liner insulating layer.
REFERENCES:
patent: 7208812 (2007-04-01), Ohta
patent: 7300877 (2007-11-01), Enomoto
patent: 2006/0063326 (2006-03-01), Brooks et al.
Dongbu Hi-Tek Co., Ltd.
Geyer Scott B
Sherr & Vaughn, PLLC
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