Method for manufacturing semiconductor wafer

Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Subsequent separation into plural bodies

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257SE21568

Reexamination Certificate

active

07829434

ABSTRACT:
To provide a method for manufacturing an SOI substrate having a single crystal semiconductor layer having a small and uniform thickness over an insulating film. Further, time of adding hydrogen ions is reduced and time of manufacture per SOI substrate is reduced. A bond layer is formed over a surface of a first semiconductor wafer and a separation layer is formed below the bond layer by irradiating the first semiconductor wafer with H3+ions by an ion doping apparatus. H3+ions accelerated by high voltage are separated to be three H+ions at a semiconductor wafer surface, and the H+ions cannot enter deeply. Therefore, H+ions are added into a shallower region in the semiconductor wafer at a higher concentration than the case of using a conventional ion implantation method.

REFERENCES:
patent: 4529571 (1985-07-01), Bacon et al.
patent: 6127702 (2000-10-01), Yamazaki et al.
patent: 6271101 (2001-08-01), Fukunaga
patent: 6335231 (2002-01-01), Yamazaki et al.
patent: 6388652 (2002-05-01), Yamazaki et al.
patent: 6468923 (2002-10-01), Yonehara et al.
patent: 6576956 (2003-06-01), Kawanaka
patent: 6602761 (2003-08-01), Fukunaga
patent: 6686623 (2004-02-01), Yamazaki
patent: 6778164 (2004-08-01), Yamazaki et al.
patent: 6803264 (2004-10-01), Yamazaki et al.
patent: 6875633 (2005-04-01), Fukunaga
patent: 7148124 (2006-12-01), Usenko
patent: 7176525 (2007-02-01), Fukunaga
patent: 7256776 (2007-08-01), Yamazaki et al.
patent: 2003/0036247 (2003-02-01), Eriksen et al.
patent: 2004/0104424 (2004-06-01), Yamazaki
patent: 2005/0009252 (2005-01-01), Yamazaki et al.
patent: 2007/0108510 (2007-05-01), Fukunaga
patent: 2007/0184632 (2007-08-01), Yamazaki et al.
patent: 2007/0281440 (2007-12-01), Cites et al.
patent: 2007/0291022 (2007-12-01), Yamazaki et al.
patent: 2008/0038908 (2008-02-01), Henley
patent: 2008/0246109 (2008-10-01), Ohnuma et al.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Method for manufacturing semiconductor wafer does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Method for manufacturing semiconductor wafer, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing semiconductor wafer will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4247389

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.