Semiconductor device manufacturing: process – Having magnetic or ferroelectric component
Reexamination Certificate
1998-06-24
2001-05-15
Tsai, Jey (Department: 2812)
Semiconductor device manufacturing: process
Having magnetic or ferroelectric component
C438S240000, C438S656000
Reexamination Certificate
active
06232131
ABSTRACT:
FIELD OF THE INVENTION
The present invention relates to a method for manufacturing a semiconductor device comprising a built-in capacitor element having a capacitor dielectric film selected from the group consisting of a capacitor dielectric film with high dielectric constant and a ferroelectric film.
BACKGROUND OF THE INVENTION
Consumer electronic equipment has been further advanced in the recent trend of high-speed and low power consumption for microcomputers etc., and semiconductor elements for semiconductor devices used in such computers are also miniaturized rapidly. Accordingly, unwanted radiation, that is, electromagnetic wave noise generated from electronic equipment, has been a serious problem. As a measure to decrease such unwanted radiation, a technique to build capacitor elements with large capacity in semiconductor integrated circuit devices and the like has attracted attention. Such capacitor elements have capacitor dielectric films of dielectric with high dielectric constant (hereinafter, high dielectric). With the trend of high integration of dynamic RAM, a technique to use high dielectric materials for a capacitor dielectric film instead of conventional silicon oxides or nitrides is widely researched. Moreover, research and development concerning ferroelectric films having spontaneous polarization property has been popular in order to practically apply a non-volatile RAM that enables writing and reading with lower working voltage and higher speed compared to conventional devices.
A method for manufacturing a conventional semiconductor device is explained below referring to
FIGS. 4A
to
4
D.
FIGS. 4A-4D
are cross-sectional views showing the process of manufacturing a conventional semiconductor device.
As shown in
FIG. 4A
, a separation oxide film
2
, a diffusion area
3
to be a source and drain for a transistor, a gate electrode
4
comprising polysilicon, and an interlayer capacitor dielectric film
5
comprising a silicon oxide film etc., are formed on a silicon substrate
1
, on which a lower electrode
6
a
comprising a multilayer of titanium and platinum, a capacitor dielectric film
6
b
comprising a ferroelectric film such as PZT (lead (Pb) zirconate titanate) and SrBi
2
Ta
2
O
9
and the like are formed throughout. Then, each layer is etched to have a desirable pattern by dry-etching such as ion milling using argon ions, so that a capacitor element
6
is formed. Next, as shown in
FIG. 4B
, an interlayer dielectric film
7
for the capacitor element is formed on the whole surface, and also formed contact holes
8
to reach a diffusion area
3
, lower electrode
6
a
and upper electrode
6
c
. Next, as shown in
FIG. 4C
, a first wiring layer
9
and a second wiring layer
10
are formed on the whole surface. The first wiring layer is a diffusion barrier layer to restrain eutectic reaction between platinum used for the electrode material of the capacitor element and aluminum used for the second wiring layer, and comprises titanium nitride. Subsequently, the first wiring layer
9
and the second wiring layer
10
are etched selectively and then, annealed in a nitrogen atmosphere at 450° C. to relieve the stress applied to the capacitor element.
In the semiconductor device manufactured in the conventional method, however, the stress provided to the capacitor element is still great even by annealing after forming the first and second wiring layers, and thus, the leakage current of the capacitor element increases and the dielectric breakdown volume is lowered.
SUMMARY OF THE INVENTION
In order to solve the above problems, this invention aims to provide a method for manufacturing a semiconductor device to prevent increase of leakage current and deterioration of the dielectric breakdown voltage of a capacitor element having a capacitor dielectric film of either a high dielectric or a ferroelectric, even if a wiring layer is formed.
In order to achieve the above objects, a method for manufacturing a semiconductor device of this invention comprises the following steps of:
forming a first wiring layer on a semiconductor substrate formed thereon a capacitor element having at least one capacitor dielectric film selected from the group consisting of a capacitor dielectric film with high dielectric constant and a ferroelectric film;
conducting a first annealing to the semiconductor substrate;
forming a second wiring layer on the first wiring layer;
selectively etching the first wiring layer and second wiring layer; and
conducting a second annealing to the semiconductor substrate.
In this invention, stress provided to the capacitor element can be reduced by annealing after the formation of each wiring layer, and thus, increase of leakage current and deterioration of dielectric breakdown volume of the capacitor element having a capacitor dielectric film of either a high capacitor dielectric film or a ferroelectric film can be prevented.
High dielectric constant in this invention is no less than 50 of dielectric constant.
In the embodiment of this invention, the first annealing step is conducted in an atmosphere of an inert gas such as nitrogen, argon and a mixture thereof, or in a vacuum of no more than 10 Torr, so that the stress to the capacitor element can be reduced without raising the resistance of the wiring layers.
In the embodiment of this invention, a heat chamber is used to maintain the temperature for the first annealing in the range from 300° C. to 450° C., so that the stress to the capacitor element can be reduced without deteriorating the characteristics of the transistor.
In the embodiment of this invention, the first annealing is conducted by a rapid thermal annealing (RTA) at a temperature ranging from 450° C. to 550° C., so that the stress to the capacitor element can be reduced without deteriorating the characteristics of the transistor even at a relatively high temperature.
In the embodiment of this invention, it is preferable that the RTA is conducted by raising temperature by lamp-heating at a rate of 50° C.-150° C./second.
In the embodiment of this invention, the first wiring layer is selected from the group consisting of titanium nitride, titanium-tungsten, a multilayer of titanium and titanium nitride, and a multilayer of titanium and titanium-tungsten.
In the embodiment of this invention, the second wiring layer is a metal layer containing aluminum.
In the embodiment of this invention, the second annealing is conducted in an atmosphere of an inert gas such as nitrogen, argon and a mixture thereof, or in a vacuum, so that the stress to the capacitor element can be reduced without raising the resistance of the wiring layer.
In the embodiment of this invention, a heat chamber is used to maintain the temperature for the second annealing in the range from 300° C. to 450° C., so that the stress to the capacitor element can be reduced without deteriorating the characteristics of the transistor.
In the embodiment of this invention, the second annealing is conducted by RTA at a temperature ranging from 450° C. to 550° C., so that the stress to the capacitor element can be reduced without deteriorating the characteristics of the transistor even at a relatively high temperature.
In the embodiment of this invention, it is preferable that the RTA is conducted by raising temperature by lamp-heating at a rate of 50° C.-150° C./second.
In one embodiment of this invention, it is preferable that the dielectric layer is at least one layer selected from the group consisting of SrBi
2
Ta
2
O
9
, SrBi
2
(TaNb)
2
O
9
, (Pb,Zr)TiO
3
, (Ba,Sr)TiO
3
, and SrTiO
3
.
In the method of this invention, a semiconductor device with superior reliability is provided by annealing a substrate in an inert gas such as nitrogen, argon, a mixed gas comprising thereof, or in a vacuum after forming a first wiring layer throughout, and subsequently forming a second wiring layer. The semiconductor device can prevent increase of leakage current and deterioration of the dielectric breakdown voltage of the capacitor element having a capacitor dielectric film of either a high capaci
Fujii Eiji
Nagano Yoshihisa
Uemoto Yasuhiro
Matsushita Electronics Corporation
Merchant & Gould P.C.
Tsai Jey
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