Fishing – trapping – and vermin destroying
Patent
1990-12-03
1992-03-10
Hearn, Brian E.
Fishing, trapping, and vermin destroying
437 49, 437 52, 148DIG138, H01L 21265
Patent
active
050949675
ABSTRACT:
A method for manufacturing a semiconductor substrate device having a non-volatile memory cell region and a logic region including MOS transistors. A first insulating film and a first electrode layer are formed on a semiconductor substrate. Only those portions of the first insulating film and first electrode layer which are located in the logic region are removed, without removing those portions of the first insulating film and first electrode layer which are located in the non-volatile memory cell region. A sacrificial film is deposited for insulation over the entire surface of the memory cell region and logic region, and then a resist film is coated on the sacrificial film. Subsequently, impurity ions are implanted into a desired channel region located in the logic region. The resist film and sacrificial film are removed, and thereafter a second insulating film and a second electrode layer are formed.
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Hanada Naoki
Mizutani Takahide
Shinada Kazuyoshi
Yoshida Masayuki
Chaudhari C.
Hearn Brian E.
Kabushiki Kaisha Toshiba
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