Semiconductor device manufacturing: process – Forming bipolar transistor by formation or alteration of... – On insulating substrate or layer
Reexamination Certificate
2011-06-07
2011-06-07
Nguyen, Khiem D (Department: 2823)
Semiconductor device manufacturing: process
Forming bipolar transistor by formation or alteration of...
On insulating substrate or layer
C438S455000, C438S481000, C257S347000, C257SE21090, C257SE21320
Reexamination Certificate
active
07955937
ABSTRACT:
By forming bulk-like transistors in sensitive RAM areas of otherwise SOI-based CMOS circuits, a significant savings in valuable chip area may be achieved since the RAM areas may be formed on the basis of a bulk transistor configuration, thereby eliminating hysteresis effects that may typically be taken into consideration by providing transistors of increased transistor width or by providing body ties. Hence, the benefit of high switching speed may be maintained in speed-critical circuitry, such as CPU cores, while at the same time the RAM circuit may be formed in a highly space-efficient manner.
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Translation of Official Communication from German Patent Office for German Patent Application No. 10 2006 015 076.7 dated Dec. 7, 2009.
Feudel Thomas
Heller Thomas
Horstmann Manfred
Wieczorek Karsten
Advanced Micro Devices , Inc.
Nguyen Khiem D
Williams Morgan & Amerson P.C.
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