Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Encapsulating
Reexamination Certificate
2002-03-25
2004-01-27
Fahmy, Wael (Department: 2814)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Encapsulating
C425S544000
Reexamination Certificate
active
06682958
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
This invention relates to a sealing apparatus for sealing a semiconductor wafer having a plurality of semiconductor elements on its surface with a resin, to a mold of the sealing apparatus, to a semiconductor wafer capable of the sealing apparatus, and to a method for manufacturing a semiconductor device by using the sealing apparatus.
2. Description of the Related Art
Recently, it has been required to shrink electric devices. To meet the requirement, it is also required to downsize a semiconductor device. As one of the solutions to satisfy these requirements, it has been proposed to form a semiconductor device having a chip size package (CSP) structure. The size of the semiconductor device having the CSP structure is almost the same as that of the semiconductor chip.
The method of forming the semiconductor device having the CSP includes a step for forming a plurality of semiconductor elements on a semiconductor wafer, a step for setting the semiconductor wafer in a mold, a step for sealing a surface of the semiconductor wafer on which the semiconductor elements are formed by a thermoset resin, a step for removing the semiconductor wafer sealed by the resin from the mold, a step for polishing the resin on the semiconductor wafer until electrodes formed on each of the circuit elements are exposed, and a step for dividing the semiconductor wafer into semiconductor devices having the CSP structure. If necessary, external terminals, such as soldering balls, may be formed on the exposed electrodes.
However, the mold in the related art includes a lower mold having a plane surface where the semiconductor wafer is mounted. In the step for setting the semiconductor wafer in the mold, the semiconductor wafer is placed on the plane surface of the lower mold. Therefore, in the following step (the sealing step), since large stress is applied to the semiconductor wafer, the semiconductor wafer may be damaged from the stress. Further, when the semiconductor wafer is removed from the mold, the semiconductor wafer may be cracked because the semiconductor wafer is adhered to the mold. The larger the diameter of a semiconductor becomes, the more conspicuous this problem becomes.
SUMMARY OF THE INVENTION
It is therefore an object of the invention to resolve the above-described problem and provide a sealing apparatus to reduce damage to the semiconductor wafer by reducing stress applied to the semiconductor wafer when the surface of the semiconductor wafer, is sealed by the resin after the semiconductor wafer is set in the mold.
It is a further object of the invention to provide a sealing apparatus to remove the semiconductor wafer from the mold smoothly by preventing the semiconductor wafer adhering to the mold.
The object is achieved by a sealing apparatus including shock absorbers under the lower mold to reduce stress applied to the semiconductor wafer.
Another object is achieved by a sealing apparatus including a lower mold having an uneven surface in an area where the semiconductor wafer is mounted.
The above and further objects and novel features of the invention will more fully appear from the following detailed description, appended claims and accompanying drawings.
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Fahmy Wael
Mimura Junichi
Oki Electric Industry Co. Ltd.
Weiss Howard
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