Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2006-04-18
2006-04-18
Luu, Chuong Anh (Department: 2818)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S613000, C438S123000, C438S612000
Reexamination Certificate
active
07029946
ABSTRACT:
A method for manufacturing a semiconductor device includes the steps of forming a stress relief layer on a wafer such that the stress relief layer is away from at least part of electrodes formed on the wafer; forming a wiring layer in which lines that extend from the electrodes to the stress relief layer are formed; forming outer electrodes that are over the stress relief layer and are connected to the lines in the wiring layer; and forming a dielectric layer by applying dielectric liquid by an inkjet method to portions in the lines where the outer electrodes are connected to form a capacitor. The step of forming the dielectric layer is conducted after the step of forming the wiring layer.
REFERENCES:
patent: 6475896 (2002-11-01), Hashimoto
patent: 6737364 (2004-05-01), Black et al.
patent: 6853433 (2005-02-01), Kim et al.
patent: 2002-057291 (2002-02-01), None
patent: 2002-057292 (2002-02-01), None
Harness & Dickey & Pierce P.L.C.
Luu Chuong Anh
Seiko Epson Corporation
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