Semiconductor device manufacturing: process – Bonding of plural semiconductor substrates – Subsequent separation into plural bodies
Reexamination Certificate
2011-01-25
2011-01-25
Lindsay, Jr., Walter L (Department: 2812)
Semiconductor device manufacturing: process
Bonding of plural semiconductor substrates
Subsequent separation into plural bodies
C438S464000, C438S033000, C438S113000, C438S118000
Reexamination Certificate
active
07875530
ABSTRACT:
First semiconductor integrated circuits and second semiconductor integrated circuits arranged over a first substrate so that each of the second semiconductor integrated circuits is adjacent to one of the first semiconductor integrated circuits are transferred to additional substrates through multiple transfer operations. After the first semiconductor integrated circuits and the second semiconductor integrated circuits formed over the first substrate are transferred to the additional substrates (a fourth substrate and a fifth substrate) respectively, the circuits are divided into a semiconductor device corresponding to each semiconductor integrated circuit. The first semiconductor integrated circuits are arranged while keeping a distance from each other over the fourth substrate, and the second semiconductor integrated circuits are arranged while keeping a distance from each other over the fifth substrate. Thus, a large division margin of each of the fourth substrate and the fifth substrate can be obtained.
REFERENCES:
patent: 6341216 (2002-01-01), Itoh
patent: 6372608 (2002-04-01), Shimoda et al.
patent: 6425971 (2002-07-01), Silverbrook
patent: 6512288 (2003-01-01), Shin et al.
patent: 6570263 (2003-05-01), Wu et al.
patent: 6867072 (2005-03-01), Shiu et al.
patent: 6939785 (2005-09-01), Kajiyama et al.
patent: 7005319 (2006-02-01), Chen et al.
patent: 7087502 (2006-08-01), Priewasser et al.
patent: 2003/0073264 (2003-04-01), Meguro et al.
patent: 2004/0247236 (2004-12-01), Yoshimura et al.
patent: 2004/0262722 (2004-12-01), Sekiguchi
patent: 2005/0106839 (2005-05-01), Shimoda et al.
patent: 2005/0158904 (2005-07-01), Hayashi et al.
patent: 2006/0013680 (2006-01-01), Haba et al.
patent: 2007/0128833 (2007-06-01), Aoki et al.
patent: 2007/0197002 (2007-08-01), Kurosawa et al.
patent: 1203710 (1998-12-01), None
patent: 0 878 918 (1998-11-01), None
patent: 2005-311333 (2005-11-01), None
patent: WO 2005/091370 (2005-09-01), None
Chinese Office Action (Application No. 2006/10163786.4) dated Dec. 4, 2009.
Aoki Tomoyuki
Dairiki Koji
Tamura Tomoko
Tsurume Takuya
Costellia Jeffrey L.
Lindsay, Jr. Walter L
Nixon & Peabody LLP
Semiconductor Energy Laboratory Co,. Ltd.
Sene Pape
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