Method for manufacturing semiconductor device

Metal working – Method of mechanical manufacture – Assembling or joining

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29571, 29576B, 357 23, H01L 21308, H01L 21265

Patent

active

044883510

ABSTRACT:
A method for manufacturing a semiconductor device, capable of forming, with good controllability, impurity regions of a low impurity concentration, includes the steps of: forming a gate electrode on a surface of a semiconductor substrate through a gate oxide film; forming a first film on the surfaces of the gate electrode and the semiconductor substrate; forming a non-single-crystalline silicon film to cover the entire surface; forming a second film to cover the entire surface; performing anisotropic etching of the second film to form residual second films on the side walls of that step portion non-single-crystalline silicon film which is formed corresponding to a shape of the gate electrode; performing etching of the non-single-crystalline silicon film by using the residual second films as masks to form residual non-single-crystalline silicon films on the side walls of the gate electrode through the first film; ion-implanting an impurity having a conductivity type opposite to that of the semiconductor substrate by using as masks the gate electrode and the residual non-single-crystalline silicon films; removing the residual non-single-crystalline silicon films; and annealing a resultant structure to activate the impurity so as to form source and drain regions each of which comprises an impurity region of a high impurity concentration and an impurity region of a low impurity concentration which is adjacent to the impurity region of the high impurity concentration and which is located under a structure area corresponding to one of the removed non-single-crystalline silicon films.

REFERENCES:
patent: 4209350 (1980-06-01), Ho et al.
patent: 4292156 (1981-09-01), Matsumoto et al.
patent: 4337132 (1982-06-01), Jones
patent: 4356623 (1982-11-01), Hunter
patent: 4376336 (1983-03-01), Endo et al.
patent: 4432132 (1984-02-01), Kinsbron et al.
Tsang et al., "Fabrication of High-Performance LDDFET's with Oxide Sidewall-Spacer Technology," IEEE Transactions on Electron Devices, vol. Ed-29, No. 4, Apr., 1982.
Tsang, et al., "Sidewall Spacer Technology," ESC Abstract No. 233, p. 373, 1982.

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