Semiconductor device manufacturing: process – Chemical etching – Vapor phase etching
Patent
1999-05-27
2000-09-12
Powell, William
Semiconductor device manufacturing: process
Chemical etching
Vapor phase etching
438715, 438719, 438742, H01L 2100
Patent
active
06117792&
ABSTRACT:
A contact hole reaching a surface of a silicon substrate and a contact hole penetrating a resistor are formed on an interlayer insulation film by simultaneous etching. Then, a laminated film having a lower Ti layer and an upper TiN layer is formed as a substrate layer (barrier layer) of a wiring on the interlayer insulation film to bury the contact hole. Then, an annealing treatment is carried out at a temperature of 620.degree. C. Consequently, the laminated film buried in the contact hole penetrating the resistor and the resistor are caused to electrically come in contact with each other on a side face of the wiring (side contact).
REFERENCES:
patent: 5521113 (1996-05-01), Hsue et al.
patent: 5945350 (1999-08-01), Violette et al.
NEC Corporation
Powell William
LandOfFree
Method for manufacturing semiconductor device does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Method for manufacturing semiconductor device, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Method for manufacturing semiconductor device will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-95807