Method for manufacturing semiconductor device

Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Insulative housing or support

Reexamination Certificate

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Details

C438S125000, C438S127000, C438S107000, C438S109000, C438S110000, C438S613000, C438S629000, C438S637000, C438S614000, C438S667000

Reexamination Certificate

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06964887

ABSTRACT:
Method for manufacturing a semiconductor device wherein thin semiconductor chips having a thickness of 50 μm or so are imbedded and mounted inside a package, and multi-level stacking is facilitated by forming external connection terminals on both surfaces of the package, or, alternatively, exposing the terminal formation portions of the wiring pattern, to which the external conncetion terminals are to be connected, out of a solder resist layer.

REFERENCES:
patent: 5111278 (1992-05-01), Eichelberger
patent: 5703400 (1997-12-01), Wojarowski et al.
patent: 5783870 (1998-07-01), Mostafazadeh
patent: 5821626 (1998-10-01), Ouch et al.
patent: 6031284 (2000-02-01), Song
patent: 6075712 (2000-06-01), McMahon
patent: 6077757 (2000-06-01), Mizuno et al.
patent: 6271469 (2001-08-01), Ma et al.
patent: 6355976 (2002-03-01), Faris

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