Method for manufacturing self-aligned bipolar transistors using

Details Method for manufacturing self-aligned bipolar transistors using Method for manufacturing self-aligned bipolar transistors using

1994-09-08

1996-01-30

Fourson, George

Fishing, trapping, and vermin destroying

437 67, 437141, 437162, 437954, 148DIG10, 148DIG11, 148DIG35, 257526, 257565, 257586, 257591, H01L 21265

Patent

active

054880025

ABSTRACT:
Manufacturing a double polysilicon layer self-aligned type bipolar transistor. A polysilicon layer for emitter impurity diffusion is formed prior to the formation of a polysilicon layer for leading out a base. A first polysilicon layer containing impurities for base impurity diffusion is deposited over the entire surface of a semiconductor structure. After the first polysilicon layer is patterned into a predetermined shape, an intrinsic base layer is formed by thermally diffusing impurities from a base impurity diffusion source. Subsequently, a second polysilicon layer containing emitter impurities is formed over the base impurity diffusion source, and then patterning is performed such that the first and second polysilicon layers remain in a region narrower than the base impurity diffusion source. Thereafter, an emitter layer is formed by thermal diffusion.

REFERENCES:
patent: 4960726 (1990-10-01), Lechaton et al.
patent: 5232861 (1993-08-01), Miwa
patent: 5279976 (1994-01-01), Hayden et al.
patent: 5302535 (1994-04-01), Imai et al.
patent: 5354699 (1994-10-01), Ikeda et al.

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