Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor
Reexamination Certificate
2007-04-24
2007-04-24
Trinh, Michael (Department: 2822)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
C438S618000, C438S622000
Reexamination Certificate
active
10855557
ABSTRACT:
A method for manufacturing a printed circuit board includes: forming inner circuit patterns in an insulating material in multi-layers, forming a plurality of through holes at certain portions of the insulating material, and forming an outer circuit pattern which is electrically connected to the inner circuit pattern, at an inner circumferential surface of the through hole and the surface of the insulating material, and a terminal portion; forming a first photo solder resist layer at an entire surface of the insulating material and an entire surface of the outer circuit pattern, and exposing the terminal portion by removing a specific portion of the first photo solder resist layer; abrading the surface of the first photo solder resist layer; printing a second photo solder resist layer at the surface of the first photo solder resist layer, and exposing the terminal portion to the outside by removing a specific portion of the second photo solder resist layer; and forming a pad portion by plating the surface of the exposed terminal portion with gold, and electrically connecting the pad portion and the terminal portion.
REFERENCES:
patent: 4211603 (1980-07-01), Reed
patent: 5948514 (1999-09-01), Komori et al.
patent: 2004/0134682 (2004-07-01), En et al.
patent: 01-290291 (1989-11-01), None
patent: 02-283095 (1990-11-01), None
Lee Kwang-Tae
Lee Sung-Gue
Lee Young-Kyu
Nam Sang-Hyuck
Youn Sung-Ho
KED & Associates LLP
Trinh Michael
LandOfFree
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