Semiconductor device manufacturing: process – Making passive device – Planar capacitor
Reexamination Certificate
2006-12-22
2009-06-09
Toledo, Fernando L (Department: 2895)
Semiconductor device manufacturing: process
Making passive device
Planar capacitor
C438S381000, C438S394000, C438S395000, C438S396000, C438S397000, C438S398000, C438S399000, C257SE21008, C257SE21022, C257SE29343
Reexamination Certificate
active
07544580
ABSTRACT:
A method for manufacturing passive components is disclosed. First, a substrate is provided, and a connecting region, a capacitor region and an inductance region are defined in the substrate. The substrate includes a first metal layer and an insulating layer on the first metal layer. Subsequently, the insulating layer is etched, and then the first metal layer is etched. Thus, an outer connecting pad in the connecting region and a bottom electrode in the capacitor region are formed simultaneously, and a part of the insulating layer on the bottom electrode remains. Thereafter, a dielectric layer is deposited, and then a dual damascene copper process is performed to form an inductance structure and a top electrode of a capacitor in the dielectric layer simultaneously. Next, a passive layer is deposited and an etching process is thereafter performed to expose the outer connecting pad.
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Hsu Winston
Lee Jae
Toledo Fernando L
United Microelectronics Corp.
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